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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 1938213002: [Atomics] Make Atomics.store a builtin using TF (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: merge again Created 4 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
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1474 } else { 1474 } else {
1475 InstructionOperand addr_reg = g.TempRegister(); 1475 InstructionOperand addr_reg = g.TempRegister();
1476 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg, 1476 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1477 g.UseRegister(index), g.UseRegister(base)); 1477 g.UseRegister(index), g.UseRegister(base));
1478 // Emit desired load opcode, using temp addr_reg. 1478 // Emit desired load opcode, using temp addr_reg.
1479 Emit(opcode | AddressingModeField::encode(kMode_MRI), 1479 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1480 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0)); 1480 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
1481 } 1481 }
1482 } 1482 }
1483 1483
1484 void InstructionSelector::VisitAtomicStore(Node* node) {
1485 MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
1486 MipsOperandGenerator g(this);
1487 Node* base = node->InputAt(0);
1488 Node* index = node->InputAt(1);
1489 Node* value = node->InputAt(2);
1490 ArchOpcode opcode = kArchNop;
1491 switch (rep) {
1492 case MachineRepresentation::kWord8:
1493 opcode = kAtomicStoreWord8;
1494 break;
1495 case MachineRepresentation::kWord16:
1496 opcode = kAtomicStoreWord16;
1497 break;
1498 case MachineRepresentation::kWord32:
1499 opcode = kAtomicStoreWord32;
1500 break;
1501 default:
1502 UNREACHABLE();
1503 return;
1504 }
1505
1506 if (g.CanBeImmediate(index, opcode)) {
1507 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1508 g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(index),
1509 g.UseRegister(value));
1510 } else {
1511 InstructionOperand addr_reg = g.TempRegister();
1512 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1513 g.UseRegister(index), g.UseRegister(base));
1514 // Emit desired store opcode, using temp addr_reg.
1515 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1516 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0),
1517 g.UseRegister(value));
1518 }
1519 }
1520
1484 // static 1521 // static
1485 MachineOperatorBuilder::Flags 1522 MachineOperatorBuilder::Flags
1486 InstructionSelector::SupportedMachineOperatorFlags() { 1523 InstructionSelector::SupportedMachineOperatorFlags() {
1487 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags; 1524 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags;
1488 if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) && 1525 if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) &&
1489 IsFp64Mode()) { 1526 IsFp64Mode()) {
1490 flags |= MachineOperatorBuilder::kFloat64RoundDown | 1527 flags |= MachineOperatorBuilder::kFloat64RoundDown |
1491 MachineOperatorBuilder::kFloat64RoundUp | 1528 MachineOperatorBuilder::kFloat64RoundUp |
1492 MachineOperatorBuilder::kFloat64RoundTruncate | 1529 MachineOperatorBuilder::kFloat64RoundTruncate |
1493 MachineOperatorBuilder::kFloat64RoundTiesEven; 1530 MachineOperatorBuilder::kFloat64RoundTiesEven;
1494 } 1531 }
1495 return flags | MachineOperatorBuilder::kWord32Ctz | 1532 return flags | MachineOperatorBuilder::kWord32Ctz |
1496 MachineOperatorBuilder::kWord32Popcnt | 1533 MachineOperatorBuilder::kWord32Popcnt |
1497 MachineOperatorBuilder::kInt32DivIsSafe | 1534 MachineOperatorBuilder::kInt32DivIsSafe |
1498 MachineOperatorBuilder::kUint32DivIsSafe | 1535 MachineOperatorBuilder::kUint32DivIsSafe |
1499 MachineOperatorBuilder::kWord32ShiftIsSafe | 1536 MachineOperatorBuilder::kWord32ShiftIsSafe |
1500 MachineOperatorBuilder::kFloat64Min | 1537 MachineOperatorBuilder::kFloat64Min |
1501 MachineOperatorBuilder::kFloat64Max | 1538 MachineOperatorBuilder::kFloat64Max |
1502 MachineOperatorBuilder::kFloat32Min | 1539 MachineOperatorBuilder::kFloat32Min |
1503 MachineOperatorBuilder::kFloat32Max | 1540 MachineOperatorBuilder::kFloat32Max |
1504 MachineOperatorBuilder::kFloat32RoundDown | 1541 MachineOperatorBuilder::kFloat32RoundDown |
1505 MachineOperatorBuilder::kFloat32RoundUp | 1542 MachineOperatorBuilder::kFloat32RoundUp |
1506 MachineOperatorBuilder::kFloat32RoundTruncate | 1543 MachineOperatorBuilder::kFloat32RoundTruncate |
1507 MachineOperatorBuilder::kFloat32RoundTiesEven; 1544 MachineOperatorBuilder::kFloat32RoundTiesEven;
1508 } 1545 }
1509 1546
1510 } // namespace compiler 1547 } // namespace compiler
1511 } // namespace internal 1548 } // namespace internal
1512 } // namespace v8 1549 } // namespace v8
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