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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
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1828 opcode = kAtomicLoadWord32; | 1828 opcode = kAtomicLoadWord32; |
1829 break; | 1829 break; |
1830 default: | 1830 default: |
1831 UNREACHABLE(); | 1831 UNREACHABLE(); |
1832 return; | 1832 return; |
1833 } | 1833 } |
1834 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), | 1834 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), |
1835 g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index)); | 1835 g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index)); |
1836 } | 1836 } |
1837 | 1837 |
| 1838 void InstructionSelector::VisitAtomicStore(Node* node) { |
| 1839 MachineRepresentation rep = AtomicStoreRepresentationOf(node->op()); |
| 1840 ArmOperandGenerator g(this); |
| 1841 Node* base = node->InputAt(0); |
| 1842 Node* index = node->InputAt(1); |
| 1843 Node* value = node->InputAt(2); |
| 1844 ArchOpcode opcode = kArchNop; |
| 1845 switch (rep) { |
| 1846 case MachineRepresentation::kWord8: |
| 1847 opcode = kAtomicStoreWord8; |
| 1848 break; |
| 1849 case MachineRepresentation::kWord16: |
| 1850 opcode = kAtomicStoreWord16; |
| 1851 break; |
| 1852 case MachineRepresentation::kWord32: |
| 1853 opcode = kAtomicStoreWord32; |
| 1854 break; |
| 1855 default: |
| 1856 UNREACHABLE(); |
| 1857 return; |
| 1858 } |
| 1859 |
| 1860 AddressingMode addressing_mode = kMode_Offset_RR; |
| 1861 InstructionOperand inputs[4]; |
| 1862 size_t input_count = 0; |
| 1863 inputs[input_count++] = g.UseUniqueRegister(base); |
| 1864 inputs[input_count++] = g.UseUniqueRegister(index); |
| 1865 inputs[input_count++] = g.UseUniqueRegister(value); |
| 1866 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); |
| 1867 Emit(code, 0, nullptr, input_count, inputs); |
| 1868 } |
| 1869 |
1838 // static | 1870 // static |
1839 MachineOperatorBuilder::Flags | 1871 MachineOperatorBuilder::Flags |
1840 InstructionSelector::SupportedMachineOperatorFlags() { | 1872 InstructionSelector::SupportedMachineOperatorFlags() { |
1841 MachineOperatorBuilder::Flags flags = | 1873 MachineOperatorBuilder::Flags flags = |
1842 MachineOperatorBuilder::kInt32DivIsSafe | | 1874 MachineOperatorBuilder::kInt32DivIsSafe | |
1843 MachineOperatorBuilder::kUint32DivIsSafe; | 1875 MachineOperatorBuilder::kUint32DivIsSafe; |
1844 if (CpuFeatures::IsSupported(ARMv7)) { | 1876 if (CpuFeatures::IsSupported(ARMv7)) { |
1845 flags |= MachineOperatorBuilder::kWord32ReverseBits; | 1877 flags |= MachineOperatorBuilder::kWord32ReverseBits; |
1846 } | 1878 } |
1847 if (CpuFeatures::IsSupported(ARMv8)) { | 1879 if (CpuFeatures::IsSupported(ARMv8)) { |
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1858 MachineOperatorBuilder::kFloat32Max | | 1890 MachineOperatorBuilder::kFloat32Max | |
1859 MachineOperatorBuilder::kFloat64Min | | 1891 MachineOperatorBuilder::kFloat64Min | |
1860 MachineOperatorBuilder::kFloat64Max; | 1892 MachineOperatorBuilder::kFloat64Max; |
1861 } | 1893 } |
1862 return flags; | 1894 return flags; |
1863 } | 1895 } |
1864 | 1896 |
1865 } // namespace compiler | 1897 } // namespace compiler |
1866 } // namespace internal | 1898 } // namespace internal |
1867 } // namespace v8 | 1899 } // namespace v8 |
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