Implements ARM SIMD multiplication and subtraction instructions.

runtime/vm/disassembler_arm.cc

Index: runtime/vm/disassembler_arm.cc
===================================================================
--- runtime/vm/disassembler_arm.cc	(revision 25008)
+++ runtime/vm/disassembler_arm.cc	(working copy)
@@ -531,7 +531,7 @@
                                    instr->SvcField());
         return 3;
       } else if (format[1] == 'z') {
-        // 'sz: Size field of SIMD instruction.
+        // 'sz: Size field of SIMD instructions.
         int sz = 8 << (instr->Bits(20, 2));
         buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
                                    remaining_size_in_buffer(),
@@ -1270,11 +1270,23 @@
   ASSERT(instr->ConditionField() == kSpecialCondition);
   if (instr->Bit(6) == 1) {
     if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) &&
-        (instr->Bit(24) == 0)) {
+        (instr->Bits(23, 2) == 0)) {
       Format(instr, "vadd.'sz 'qd, 'qn, 'qm");

[regis, 2013/07/16 00:23:30]

This will print 'vadd.I16' for example. So far, we tried to stick to our own
assembler syntax. Here, we use vaddqi, where i is defined by an argument. So it
may be better to print 'vaddqb', vaddqh', or 'vaddqw'.
Just a remark. Not insisting on it.

[zra, 2013/07/16 16:11:01]

Done.

     } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) &&
-        (instr->Bit(24) == 0)) {
+               (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 0)) {
       Format(instr, "vadd.F32 'qd, 'qn, 'qm");

[regis, 2013/07/16 00:23:30]

If we apply the logic above, this would be 'vaddqs'.

[zra, 2013/07/16 16:11:01]

Done.

+    } else if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) &&
+               (instr->Bits(23, 2) == 2)) {
+      Format(instr, "vsub.'sz 'qd, 'qn, 'qm");
+    } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) &&
+               (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) {
+      Format(instr, "vsub.F32 'qd, 'qn, 'qm");
+    } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) &&
+               (instr->Bits(23, 2) == 0)) {
+      Format(instr, "vmul.'sz 'qd, 'qn, 'qm");
+    } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) &&
+               (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) {
+      Format(instr, "vmul.F32 'qd, 'qn, 'qm");
     } else {
       Unknown(instr);
     }