Implements ARM SIMD multiplication and subtraction instructions.

runtime/vm/simulator_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <math.h>  // for isnan.
 #include <setjmp.h>
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
@@ skipping 429 matching lines @@
                   "  other variants are:\n"
                   "    disasm <address>\n"
                   "    disasm <address> <number_of_instructions>\n"
                   "  by default 10 instrs are disassembled\n"
                   "del -- delete breakpoints\n"
                   "flags -- print flag values\n"
                   "gdb -- transfer control to gdb\n"
                   "h/help -- print this help string\n"
                   "break <address> -- set break point at specified address\n"
                   "p/print <reg or value or *addr> -- print integer value\n"
-                  "pf/printfloat <sreg or *addr> -- print float value\n"
+                  "ps/printsingle <sreg or *addr> -- print float value\n"
                   "pd/printdouble <dreg or *addr> -- print double value\n"
                   "po/printobject <*reg or *addr> -- print object\n"
                   "si/stepi -- single step an instruction\n"
                   "trace -- toggle execution tracing mode\n"
                   "bt -- print backtrace\n"
                   "unstop -- if current pc is a stop instr make it a nop\n"
                   "q/quit -- Quit the debugger and exit the program\n");
       } else if ((strcmp(cmd, "quit") == 0) || (strcmp(cmd, "q") == 0)) {
         OS::Print("Quitting\n");
         OS::Exit(0);
       } else if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
       } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
         // Execute the one instruction we broke at with breakpoints disabled.
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
         // Leave the debugger shell.
         done = true;
       } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
         if (args == 2) {
           uint32_t value;
           if (GetValue(arg1, &value)) {
             OS::Print("%s: %u 0x%x\n", arg1, value, value);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("print <reg or value or *addr>\n");
         }
-      } else if ((strcmp(cmd, "pf") == 0) || (strcmp(cmd, "printfloat") == 0)) {
+      } else if ((strcmp(cmd, "ps") == 0) ||
+                 (strcmp(cmd, "printsingle") == 0)) {
         if (args == 2) {
           float fvalue;
           if (GetFValue(arg1, &fvalue)) {
             uint32_t value = bit_cast<uint32_t, float>(fvalue);
             OS::Print("%s: 0%u 0x%x %.8g\n", arg1, value, value, fvalue);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("printfloat <sreg or *addr>\n");
@@ skipping 2424 matching lines @@
     int8_t* s8n_8 = reinterpret_cast<int8_t*>(&s8n);
     int8_t* s8m_8 = reinterpret_cast<int8_t*>(&s8m);
     int16_t* s8d_16 = reinterpret_cast<int16_t*>(&s8d);
     int16_t* s8n_16 = reinterpret_cast<int16_t*>(&s8n);
     int16_t* s8m_16 = reinterpret_cast<int16_t*>(&s8m);
     int64_t* s8d_64 = reinterpret_cast<int64_t*>(&s8d);
     int64_t* s8n_64 = reinterpret_cast<int64_t*>(&s8n);
     int64_t* s8m_64 = reinterpret_cast<int64_t*>(&s8m);
 
     if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) &&
-        (instr->Bit(24) == 0)) {
+        (instr->Bits(23, 2) == 0)) {
       // Uses q registers.
       // Format(instr, "vadd.'sz 'qd, 'qn, 'qm");
       const int size = instr->Bits(20, 2);
       if (size == 0) {
         for (int i = 0; i < 16; i++) {
           s8d_8[i] = s8n_8[i] + s8m_8[i];
         }
       } else if (size == 1) {
         for (int i = 0; i < 8; i++) {
           s8d_16[i] = s8n_16[i] + s8m_16[i];
         }
       } else if (size == 2) {
         for (int i = 0; i < 4; i++) {
           s8d.data_[i].u = s8n.data_[i].u + s8m.data_[i].u;
         }
       } else if (size == 3) {
         for (int i = 0; i < 2; i++) {
           s8d_64[i] = s8n_64[i] + s8m_64[i];
         }
       } else {
         UNREACHABLE();
       }
     } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) &&
-               (instr->Bit(24) == 0)) {
+               (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 0)) {
       // Format(instr, "vadd.F32 'qd, 'qn, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f = s8n.data_[i].f + s8m.data_[i].f;
       }
+    } else if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) &&
+               (instr->Bits(23, 2) == 2)) {
+      // Format(instr, "vsub.'sz 'qd, 'qn, 'qm");
+      const int size = instr->Bits(20, 2);
+      if (size == 0) {
+        for (int i = 0; i < 16; i++) {
+          s8d_8[i] = s8n_8[i] - s8m_8[i];
+        }
+      } else if (size == 1) {
+        for (int i = 0; i < 8; i++) {
+          s8d_16[i] = s8n_16[i] - s8m_16[i];
+        }
+      } else if (size == 2) {
+        for (int i = 0; i < 4; i++) {
+          s8d.data_[i].u = s8n.data_[i].u - s8m.data_[i].u;
+        }
+      } else if (size == 3) {
+        for (int i = 0; i < 2; i++) {
+          s8d_64[i] = s8n_64[i] - s8m_64[i];
+        }
+      } else {
+        UNREACHABLE();
+      }
+    } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) &&
+               (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) {
+      // Format(instr, "vsub.F32 'qd, 'qn, 'qm");
+      for (int i = 0; i < 4; i++) {
+        s8d.data_[i].f = s8n.data_[i].f - s8m.data_[i].f;
+      }
+    } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) &&
+               (instr->Bits(23, 2) == 0)) {
+      // Format(instr, "vmul.'sz 'qd, 'qn, 'qm");
+      const int size = instr->Bits(20, 2);
+      if (size == 0) {
+        for (int i = 0; i < 16; i++) {
+          s8d_8[i] = s8n_8[i] * s8m_8[i];
+        }
+      } else if (size == 1) {
+        for (int i = 0; i < 8; i++) {
+          s8d_16[i] = s8n_16[i] * s8m_16[i];
+        }
+      } else if (size == 2) {
+        for (int i = 0; i < 4; i++) {
+          s8d.data_[i].u = s8n.data_[i].u * s8m.data_[i].u;
+        }
+      } else if (size == 3) {
+        UnimplementedInstruction(instr);
+      } else {
+        UNREACHABLE();
+      }
+    } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) &&
+               (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) {
+      // Format(instr, "vmul.F32 'qd, 'qn, 'qm");
+      for (int i = 0; i < 4; i++) {
+        s8d.data_[i].f = s8n.data_[i].f * s8m.data_[i].f;
+      }
     } else {
       UnimplementedInstruction(instr);
     }
 
     set_qregister(qd, s8d);
   } else {
     // Q == 0, Uses 64-bit D registers.
     UnimplementedInstruction(instr);
   }
 }
@@ skipping 233 matching lines @@
   set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
   set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_ARM)
 
 #endif  // defined TARGET_ARCH_ARM