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Issue 192743006: MIPS: Reland "Handle non-power-of-2 divisors in division-like operations". (Closed) Base URL: https://github.com/v8/v8.git@gbl
Patch Set: Created 6 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1297 int pc; 1297 int pc;
1298 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders. 1298 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders.
1299 const char* name; 1299 const char* name;
1300 }; 1300 };
1301 1301
1302 Handle<Object> CodeObject() { 1302 Handle<Object> CodeObject() {
1303 ASSERT(!code_object_.is_null()); 1303 ASSERT(!code_object_.is_null());
1304 return code_object_; 1304 return code_object_;
1305 } 1305 }
1306 1306
1307 // Emit code for a flooring division by a constant. The dividend register is
1308 // unchanged and ip gets clobbered. Dividend and result must be different.
Paul Lind 2014/03/10 19:45:56 nit: reg name should be at
1309 void FlooringDiv(Register result, Register dividend, int32_t divisor);
1310
1307 // ------------------------------------------------------------------------- 1311 // -------------------------------------------------------------------------
1308 // StatsCounter support. 1312 // StatsCounter support.
1309 1313
1310 void SetCounter(StatsCounter* counter, int value, 1314 void SetCounter(StatsCounter* counter, int value,
1311 Register scratch1, Register scratch2); 1315 Register scratch1, Register scratch2);
1312 void IncrementCounter(StatsCounter* counter, int value, 1316 void IncrementCounter(StatsCounter* counter, int value,
1313 Register scratch1, Register scratch2); 1317 Register scratch1, Register scratch2);
1314 void DecrementCounter(StatsCounter* counter, int value, 1318 void DecrementCounter(StatsCounter* counter, int value,
1315 Register scratch1, Register scratch2); 1319 Register scratch1, Register scratch2);
1316 1320
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1665 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 1669 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1666 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1670 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1667 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1671 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1668 #else 1672 #else
1669 #define ACCESS_MASM(masm) masm-> 1673 #define ACCESS_MASM(masm) masm->
1670 #endif 1674 #endif
1671 1675
1672 } } // namespace v8::internal 1676 } } // namespace v8::internal
1673 1677
1674 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1678 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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