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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/disassembler.h" | 5 #include "vm/disassembler.h" |
| 6 | 6 |
| 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. | 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. |
| 8 #if defined(TARGET_ARCH_ARM) | 8 #if defined(TARGET_ARCH_ARM) |
| 9 #include "platform/assert.h" | 9 #include "platform/assert.h" |
| 10 | 10 |
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| 1272 Unknown(instr); | 1272 Unknown(instr); |
| 1273 } | 1273 } |
| 1274 } | 1274 } |
| 1275 | 1275 |
| 1276 | 1276 |
| 1277 void ARMDecoder::DecodeSIMDDataProcessing(Instr* instr) { | 1277 void ARMDecoder::DecodeSIMDDataProcessing(Instr* instr) { |
| 1278 ASSERT(instr->ConditionField() == kSpecialCondition); | 1278 ASSERT(instr->ConditionField() == kSpecialCondition); |
| 1279 if (instr->Bit(6) == 1) { | 1279 if (instr->Bit(6) == 1) { |
| 1280 if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) && | 1280 if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) && |
| 1281 (instr->Bits(23, 2) == 0)) { | 1281 (instr->Bits(23, 2) == 0)) { |
| 1282 Format(instr, "vaddqi'sz 'qd, 'qn, 'qm"); | 1282 Format(instr, "vaddq'sz 'qd, 'qn, 'qm"); |
| 1283 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) && | 1283 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) && |
| 1284 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 0)) { | 1284 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 0)) { |
| 1285 Format(instr, "vaddqs 'qd, 'qn, 'qm"); | 1285 Format(instr, "vaddqs 'qd, 'qn, 'qm"); |
| 1286 } else if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) && | 1286 } else if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 0) && |
| 1287 (instr->Bits(23, 2) == 2)) { | 1287 (instr->Bits(23, 2) == 2)) { |
| 1288 Format(instr, "vsubqi'sz 'qd, 'qn, 'qm"); | 1288 Format(instr, "vsubq'sz 'qd, 'qn, 'qm"); |
| 1289 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) && | 1289 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) && |
| 1290 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) { | 1290 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) { |
| 1291 Format(instr, "vsubqs 'qd, 'qn, 'qm"); | 1291 Format(instr, "vsubqs 'qd, 'qn, 'qm"); |
| 1292 } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) && | 1292 } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) && |
| 1293 (instr->Bits(23, 2) == 0)) { | 1293 (instr->Bits(23, 2) == 0)) { |
| 1294 Format(instr, "vmulqi'sz 'qd, 'qn, 'qm"); | 1294 Format(instr, "vmulq'sz 'qd, 'qn, 'qm"); |
| 1295 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) && | 1295 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) && |
| 1296 (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) { | 1296 (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) { |
| 1297 Format(instr, "vmulqs 'qd, 'qn, 'qm"); | 1297 Format(instr, "vmulqs 'qd, 'qn, 'qm"); |
| 1298 } else { | 1298 } else { |
| 1299 Unknown(instr); | 1299 Unknown(instr); |
| 1300 } | 1300 } |
| 1301 } else { | 1301 } else { |
| 1302 Unknown(instr); | 1302 Unknown(instr); |
| 1303 } | 1303 } |
| 1304 } | 1304 } |
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| 1399 human_buffer, | 1399 human_buffer, |
| 1400 sizeof(human_buffer), | 1400 sizeof(human_buffer), |
| 1401 pc); | 1401 pc); |
| 1402 pc += instruction_length; | 1402 pc += instruction_length; |
| 1403 } | 1403 } |
| 1404 } | 1404 } |
| 1405 | 1405 |
| 1406 } // namespace dart | 1406 } // namespace dart |
| 1407 | 1407 |
| 1408 #endif // defined TARGET_ARCH_ARM | 1408 #endif // defined TARGET_ARCH_ARM |
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