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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef VM_ASSEMBLER_ARM_H_ | 5 #ifndef VM_ASSEMBLER_ARM_H_ |
| 6 #define VM_ASSEMBLER_ARM_H_ | 6 #define VM_ASSEMBLER_ARM_H_ |
| 7 | 7 |
| 8 #ifndef VM_ASSEMBLER_H_ | 8 #ifndef VM_ASSEMBLER_H_ |
| 9 #error Do not include assembler_arm.h directly; use assembler.h instead. | 9 #error Do not include assembler_arm.h directly; use assembler.h instead. |
| 10 #endif | 10 #endif |
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| 169 } | 169 } |
| 170 | 170 |
| 171 uint32_t type_; // Encodes the type field (bits 27-25) in the instruction. | 171 uint32_t type_; // Encodes the type field (bits 27-25) in the instruction. |
| 172 uint32_t encoding_; | 172 uint32_t encoding_; |
| 173 | 173 |
| 174 friend class Assembler; | 174 friend class Assembler; |
| 175 friend class Address; | 175 friend class Address; |
| 176 }; | 176 }; |
| 177 | 177 |
| 178 | 178 |
| 179 enum LoadOperandType { | 179 enum OperandSize { |
| 180 kLoadSignedByte, | 180 kByte, |
| 181 kLoadUnsignedByte, | 181 kUnsignedByte, |
| 182 kLoadSignedHalfword, | 182 kHalfword, |
| 183 kLoadUnsignedHalfword, | 183 kUnsignedHalfword, |
| 184 kLoadWord, | 184 kWord, |
| 185 kLoadWordPair, | 185 kUnsignedWord, |
| 186 kLoadSWord, | 186 kWordPair, |
| 187 kLoadDWord | 187 kSWord, |
| 188 }; | 188 kDWord, |
| 189 | |
| 190 | |
| 191 enum StoreOperandType { | |
| 192 kStoreByte, | |
| 193 kStoreHalfword, | |
| 194 kStoreWord, | |
| 195 kStoreWordPair, | |
| 196 kStoreSWord, | |
| 197 kStoreDWord | |
| 198 }; | 189 }; |
| 199 | 190 |
| 200 | 191 |
| 201 // Load/store multiple addressing mode. | 192 // Load/store multiple addressing mode. |
| 202 enum BlockAddressMode { | 193 enum BlockAddressMode { |
| 203 // bit encoding P U W | 194 // bit encoding P U W |
| 204 DA = (0|0|0) << 21, // decrement after | 195 DA = (0|0|0) << 21, // decrement after |
| 205 IA = (0|4|0) << 21, // increment after | 196 IA = (0|4|0) << 21, // increment after |
| 206 DB = (8|0|0) << 21, // decrement before | 197 DB = (8|0|0) << 21, // decrement before |
| 207 IB = (8|4|0) << 21, // increment before | 198 IB = (8|4|0) << 21, // increment before |
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| 261 } else { | 252 } else { |
| 262 kind_ = ScaledIndexRegister; | 253 kind_ = ScaledIndexRegister; |
| 263 } | 254 } |
| 264 encoding_ = so.encoding() | am | (static_cast<uint32_t>(rn) << kRnShift); | 255 encoding_ = so.encoding() | am | (static_cast<uint32_t>(rn) << kRnShift); |
| 265 } | 256 } |
| 266 | 257 |
| 267 bool Equals(const Address& other) { | 258 bool Equals(const Address& other) { |
| 268 return (encoding_ == other.encoding_) && (kind_ == other.kind_); | 259 return (encoding_ == other.encoding_) && (kind_ == other.kind_); |
| 269 } | 260 } |
| 270 | 261 |
| 271 static bool CanHoldLoadOffset(LoadOperandType type, | 262 static bool CanHoldLoadOffset(OperandSize type, |
| 272 int32_t offset, | 263 int32_t offset, |
| 273 int32_t* offset_mask); | 264 int32_t* offset_mask); |
| 274 static bool CanHoldStoreOffset(StoreOperandType type, | 265 static bool CanHoldStoreOffset(OperandSize type, |
| 275 int32_t offset, | 266 int32_t offset, |
| 276 int32_t* offset_mask); | 267 int32_t* offset_mask); |
| 277 | 268 |
| 278 private: | 269 private: |
| 279 uint32_t encoding() const { return encoding_; } | 270 uint32_t encoding() const { return encoding_; } |
| 280 | 271 |
| 281 // Encoding for addressing mode 3. | 272 // Encoding for addressing mode 3. |
| 282 uint32_t encoding3() const; | 273 uint32_t encoding3() const; |
| 283 | 274 |
| 284 // Encoding for vfp load/store addressing. | 275 // Encoding for vfp load/store addressing. |
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| 472 void vstms(BlockAddressMode am, Register base, | 463 void vstms(BlockAddressMode am, Register base, |
| 473 SRegister first, SRegister last, Condition cond = AL); | 464 SRegister first, SRegister last, Condition cond = AL); |
| 474 | 465 |
| 475 void vldmd(BlockAddressMode am, Register base, | 466 void vldmd(BlockAddressMode am, Register base, |
| 476 DRegister first, DRegister last, Condition cond = AL); | 467 DRegister first, DRegister last, Condition cond = AL); |
| 477 void vstmd(BlockAddressMode am, Register base, | 468 void vstmd(BlockAddressMode am, Register base, |
| 478 DRegister first, DRegister last, Condition cond = AL); | 469 DRegister first, DRegister last, Condition cond = AL); |
| 479 | 470 |
| 480 void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); | 471 void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); |
| 481 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); | 472 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); |
| 482 void vaddqi(int sz, QRegister qd, QRegister qn, QRegister qm); | 473 void vaddqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm); |
| 483 void vaddqs(QRegister qd, QRegister qn, QRegister qm); | 474 void vaddqs(QRegister qd, QRegister qn, QRegister qm); |
| 484 void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); | 475 void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); |
| 485 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); | 476 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); |
| 486 void vsubqi(int sz, QRegister qd, QRegister qn, QRegister qm); | 477 void vsubqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm); |
| 487 void vsubqs(QRegister qd, QRegister qn, QRegister qm); | 478 void vsubqs(QRegister qd, QRegister qn, QRegister qm); |
| 488 void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); | 479 void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); |
| 489 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); | 480 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); |
| 490 void vmulqi(int sz, QRegister qd, QRegister qn, QRegister qm); | 481 void vmulqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm); |
| 491 void vmulqs(QRegister qd, QRegister qn, QRegister qm); | 482 void vmulqs(QRegister qd, QRegister qn, QRegister qm); |
| 492 void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); | 483 void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); |
| 493 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); | 484 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); |
| 494 void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); | 485 void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); |
| 495 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); | 486 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); |
| 496 void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); | 487 void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL); |
| 497 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); | 488 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL); |
| 498 | 489 |
| 499 void vabss(SRegister sd, SRegister sm, Condition cond = AL); | 490 void vabss(SRegister sd, SRegister sm, Condition cond = AL); |
| 500 void vabsd(DRegister dd, DRegister dm, Condition cond = AL); | 491 void vabsd(DRegister dd, DRegister dm, Condition cond = AL); |
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| 592 void StoreIntoObjectNoBarrier(Register object, | 583 void StoreIntoObjectNoBarrier(Register object, |
| 593 const Address& dest, | 584 const Address& dest, |
| 594 const Object& value); | 585 const Object& value); |
| 595 | 586 |
| 596 void LoadClassId(Register result, Register object); | 587 void LoadClassId(Register result, Register object); |
| 597 void LoadClassById(Register result, Register class_id); | 588 void LoadClassById(Register result, Register class_id); |
| 598 void LoadClass(Register result, Register object, Register scratch); | 589 void LoadClass(Register result, Register object, Register scratch); |
| 599 void CompareClassId(Register object, intptr_t class_id, Register scratch); | 590 void CompareClassId(Register object, intptr_t class_id, Register scratch); |
| 600 | 591 |
| 601 void LoadWordFromPoolOffset(Register rd, int32_t offset, Condition cond = AL); | 592 void LoadWordFromPoolOffset(Register rd, int32_t offset, Condition cond = AL); |
| 602 void LoadFromOffset(LoadOperandType type, | 593 void LoadFromOffset(OperandSize type, |
| 603 Register reg, | 594 Register reg, |
| 604 Register base, | 595 Register base, |
| 605 int32_t offset, | 596 int32_t offset, |
| 606 Condition cond = AL); | 597 Condition cond = AL); |
| 607 void StoreToOffset(StoreOperandType type, | 598 void StoreToOffset(OperandSize type, |
| 608 Register reg, | 599 Register reg, |
| 609 Register base, | 600 Register base, |
| 610 int32_t offset, | 601 int32_t offset, |
| 611 Condition cond = AL); | 602 Condition cond = AL); |
| 612 void LoadSFromOffset(SRegister reg, | 603 void LoadSFromOffset(SRegister reg, |
| 613 Register base, | 604 Register base, |
| 614 int32_t offset, | 605 int32_t offset, |
| 615 Condition cond = AL); | 606 Condition cond = AL); |
| 616 void StoreSToOffset(SRegister reg, | 607 void StoreSToOffset(SRegister reg, |
| 617 Register base, | 608 Register base, |
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| 806 void EmitVFPsd(Condition cond, | 797 void EmitVFPsd(Condition cond, |
| 807 int32_t opcode, | 798 int32_t opcode, |
| 808 SRegister sd, | 799 SRegister sd, |
| 809 DRegister dm); | 800 DRegister dm); |
| 810 | 801 |
| 811 void EmitVFPds(Condition cond, | 802 void EmitVFPds(Condition cond, |
| 812 int32_t opcode, | 803 int32_t opcode, |
| 813 DRegister dd, | 804 DRegister dd, |
| 814 SRegister sm); | 805 SRegister sm); |
| 815 | 806 |
| 816 void EmitSIMDqqq(int32_t opcode, int sz, | 807 void EmitSIMDqqq(int32_t opcode, OperandSize sz, |
| 817 QRegister qd, QRegister qn, QRegister qm); | 808 QRegister qd, QRegister qn, QRegister qm); |
| 818 | 809 |
| 819 void EmitBranch(Condition cond, Label* label, bool link); | 810 void EmitBranch(Condition cond, Label* label, bool link); |
| 820 static int32_t EncodeBranchOffset(int32_t offset, int32_t inst); | 811 static int32_t EncodeBranchOffset(int32_t offset, int32_t inst); |
| 821 static int DecodeBranchOffset(int32_t inst); | 812 static int DecodeBranchOffset(int32_t inst); |
| 822 int32_t EncodeTstOffset(int32_t offset, int32_t inst); | 813 int32_t EncodeTstOffset(int32_t offset, int32_t inst); |
| 823 int DecodeTstOffset(int32_t inst); | 814 int DecodeTstOffset(int32_t inst); |
| 824 | 815 |
| 825 void StoreIntoObjectFilter(Register object, Register value, Label* no_update); | 816 void StoreIntoObjectFilter(Register object, Register value, Label* no_update); |
| 826 | 817 |
| 827 // Shorter filtering sequence that assumes that value is not a smi. | 818 // Shorter filtering sequence that assumes that value is not a smi. |
| 828 void StoreIntoObjectFilterNoSmi(Register object, | 819 void StoreIntoObjectFilterNoSmi(Register object, |
| 829 Register value, | 820 Register value, |
| 830 Label* no_update); | 821 Label* no_update); |
| 831 | 822 |
| 832 DISALLOW_ALLOCATION(); | 823 DISALLOW_ALLOCATION(); |
| 833 DISALLOW_COPY_AND_ASSIGN(Assembler); | 824 DISALLOW_COPY_AND_ASSIGN(Assembler); |
| 834 }; | 825 }; |
| 835 | 826 |
| 836 } // namespace dart | 827 } // namespace dart |
| 837 | 828 |
| 838 #endif // VM_ASSEMBLER_ARM_H_ | 829 #endif // VM_ASSEMBLER_ARM_H_ |
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