Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(307)

Side by Side Diff: third_party/boringssl/linux-x86/crypto/cpu-x86-asm.S

Issue 1924693003: Rolls BoringSSL forward (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 4 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
(Empty)
1 #if defined(__i386__)
2 .file "crypto/cpu-x86-asm.S"
3 .text
4 .globl OPENSSL_ia32_cpuid
5 .hidden OPENSSL_ia32_cpuid
6 .type OPENSSL_ia32_cpuid,@function
7 .align 16
8 OPENSSL_ia32_cpuid:
9 .L_OPENSSL_ia32_cpuid_begin:
10 pushl %ebp
11 pushl %ebx
12 pushl %esi
13 pushl %edi
14 xorl %edx,%edx
15 pushfl
16 popl %eax
17 movl %eax,%ecx
18 xorl $2097152,%eax
19 pushl %eax
20 popfl
21 pushfl
22 popl %eax
23 xorl %eax,%ecx
24 xorl %eax,%eax
25 btl $21,%ecx
26 jnc .L000nocpuid
27 movl 20(%esp),%esi
28 movl %eax,8(%esi)
29 .byte 0x0f,0xa2
30 movl %eax,%edi
31 xorl %eax,%eax
32 cmpl $1970169159,%ebx
33 setne %al
34 movl %eax,%ebp
35 cmpl $1231384169,%edx
36 setne %al
37 orl %eax,%ebp
38 cmpl $1818588270,%ecx
39 setne %al
40 orl %eax,%ebp
41 jz .L001intel
42 cmpl $1752462657,%ebx
43 setne %al
44 movl %eax,%esi
45 cmpl $1769238117,%edx
46 setne %al
47 orl %eax,%esi
48 cmpl $1145913699,%ecx
49 setne %al
50 orl %eax,%esi
51 jnz .L001intel
52 movl $2147483648,%eax
53 .byte 0x0f,0xa2
54 cmpl $2147483649,%eax
55 jb .L001intel
56 movl %eax,%esi
57 movl $2147483649,%eax
58 .byte 0x0f,0xa2
59 orl %ecx,%ebp
60 andl $2049,%ebp
61 cmpl $2147483656,%esi
62 jb .L001intel
63 movl $2147483656,%eax
64 .byte 0x0f,0xa2
65 movzbl %cl,%esi
66 incl %esi
67 movl $1,%eax
68 xorl %ecx,%ecx
69 .byte 0x0f,0xa2
70 btl $28,%edx
71 jnc .L002generic
72 shrl $16,%ebx
73 andl $255,%ebx
74 cmpl %esi,%ebx
75 ja .L002generic
76 andl $4026531839,%edx
77 jmp .L002generic
78 .L001intel:
79 cmpl $7,%edi
80 jb .L003cacheinfo
81 movl 20(%esp),%esi
82 movl $7,%eax
83 xorl %ecx,%ecx
84 .byte 0x0f,0xa2
85 movl %ebx,8(%esi)
86 .L003cacheinfo:
87 cmpl $4,%edi
88 movl $-1,%edi
89 jb .L004nocacheinfo
90 movl $4,%eax
91 movl $0,%ecx
92 .byte 0x0f,0xa2
93 movl %eax,%edi
94 shrl $14,%edi
95 andl $4095,%edi
96 .L004nocacheinfo:
97 movl $1,%eax
98 xorl %ecx,%ecx
99 .byte 0x0f,0xa2
100 andl $3220176895,%edx
101 cmpl $0,%ebp
102 jne .L005notintel
103 orl $1073741824,%edx
104 .L005notintel:
105 btl $28,%edx
106 jnc .L002generic
107 andl $4026531839,%edx
108 cmpl $0,%edi
109 je .L002generic
110 orl $268435456,%edx
111 shrl $16,%ebx
112 cmpb $1,%bl
113 ja .L002generic
114 andl $4026531839,%edx
115 .L002generic:
116 andl $2048,%ebp
117 andl $4294965247,%ecx
118 movl %edx,%esi
119 orl %ecx,%ebp
120 btl $27,%ecx
121 jnc .L006clear_avx
122 xorl %ecx,%ecx
123 .byte 15,1,208
124 andl $6,%eax
125 cmpl $6,%eax
126 je .L007done
127 cmpl $2,%eax
128 je .L006clear_avx
129 .L008clear_xmm:
130 andl $4261412861,%ebp
131 andl $4278190079,%esi
132 .L006clear_avx:
133 andl $4026525695,%ebp
134 movl 20(%esp),%edi
135 andl $4294967263,8(%edi)
136 .L007done:
137 movl %esi,%eax
138 movl %ebp,%edx
139 .L000nocpuid:
140 popl %edi
141 popl %esi
142 popl %ebx
143 popl %ebp
144 ret
145 .size OPENSSL_ia32_cpuid,.-.L_OPENSSL_ia32_cpuid_begin
146 .globl OPENSSL_rdtsc
147 .hidden OPENSSL_rdtsc
148 .type OPENSSL_rdtsc,@function
149 .align 16
150 OPENSSL_rdtsc:
151 .L_OPENSSL_rdtsc_begin:
152 xorl %eax,%eax
153 xorl %edx,%edx
154 call .L009PIC_me_up
155 .L009PIC_me_up:
156 popl %ecx
157 leal OPENSSL_ia32cap_P-.L009PIC_me_up(%ecx),%ecx
158 btl $4,(%ecx)
159 jnc .L010notsc
160 .byte 0x0f,0x31
161 .L010notsc:
162 ret
163 .size OPENSSL_rdtsc,.-.L_OPENSSL_rdtsc_begin
164 .globl OPENSSL_instrument_halt
165 .hidden OPENSSL_instrument_halt
166 .type OPENSSL_instrument_halt,@function
167 .align 16
168 OPENSSL_instrument_halt:
169 .L_OPENSSL_instrument_halt_begin:
170 call .L011PIC_me_up
171 .L011PIC_me_up:
172 popl %ecx
173 leal OPENSSL_ia32cap_P-.L011PIC_me_up(%ecx),%ecx
174 btl $4,(%ecx)
175 jnc .L012nohalt
176 .long 2421723150
177 andl $3,%eax
178 jnz .L012nohalt
179 pushfl
180 popl %eax
181 btl $9,%eax
182 jnc .L012nohalt
183 .byte 0x0f,0x31
184 pushl %edx
185 pushl %eax
186 hlt
187 .byte 0x0f,0x31
188 subl (%esp),%eax
189 sbbl 4(%esp),%edx
190 addl $8,%esp
191 ret
192 .L012nohalt:
193 xorl %eax,%eax
194 xorl %edx,%edx
195 ret
196 .size OPENSSL_instrument_halt,.-.L_OPENSSL_instrument_halt_begin
197 .globl OPENSSL_far_spin
198 .hidden OPENSSL_far_spin
199 .type OPENSSL_far_spin,@function
200 .align 16
201 OPENSSL_far_spin:
202 .L_OPENSSL_far_spin_begin:
203 pushfl
204 popl %eax
205 btl $9,%eax
206 jnc .L013nospin
207 movl 4(%esp),%eax
208 movl 8(%esp),%ecx
209 .long 2430111262
210 xorl %eax,%eax
211 movl (%ecx),%edx
212 jmp .L014spin
213 .align 16
214 .L014spin:
215 incl %eax
216 cmpl (%ecx),%edx
217 je .L014spin
218 .long 529567888
219 ret
220 .L013nospin:
221 xorl %eax,%eax
222 xorl %edx,%edx
223 ret
224 .size OPENSSL_far_spin,.-.L_OPENSSL_far_spin_begin
225 .globl OPENSSL_wipe_cpu
226 .hidden OPENSSL_wipe_cpu
227 .type OPENSSL_wipe_cpu,@function
228 .align 16
229 OPENSSL_wipe_cpu:
230 .L_OPENSSL_wipe_cpu_begin:
231 xorl %eax,%eax
232 xorl %edx,%edx
233 call .L015PIC_me_up
234 .L015PIC_me_up:
235 popl %ecx
236 leal OPENSSL_ia32cap_P-.L015PIC_me_up(%ecx),%ecx
237 movl (%ecx),%ecx
238 btl $1,(%ecx)
239 jnc .L016no_x87
240 andl $83886080,%ecx
241 cmpl $83886080,%ecx
242 jne .L017no_sse2
243 pxor %xmm0,%xmm0
244 pxor %xmm1,%xmm1
245 pxor %xmm2,%xmm2
246 pxor %xmm3,%xmm3
247 pxor %xmm4,%xmm4
248 pxor %xmm5,%xmm5
249 pxor %xmm6,%xmm6
250 pxor %xmm7,%xmm7
251 .L017no_sse2:
252 .long 4007259865,4007259865,4007259865,4007259865,2430851995
253 .L016no_x87:
254 leal 4(%esp),%eax
255 ret
256 .size OPENSSL_wipe_cpu,.-.L_OPENSSL_wipe_cpu_begin
257 .globl OPENSSL_atomic_add
258 .hidden OPENSSL_atomic_add
259 .type OPENSSL_atomic_add,@function
260 .align 16
261 OPENSSL_atomic_add:
262 .L_OPENSSL_atomic_add_begin:
263 movl 4(%esp),%edx
264 movl 8(%esp),%ecx
265 pushl %ebx
266 nop
267 movl (%edx),%eax
268 .L018spin:
269 leal (%eax,%ecx,1),%ebx
270 nop
271 .long 447811568
272 jne .L018spin
273 movl %ebx,%eax
274 popl %ebx
275 ret
276 .size OPENSSL_atomic_add,.-.L_OPENSSL_atomic_add_begin
277 .globl OPENSSL_indirect_call
278 .hidden OPENSSL_indirect_call
279 .type OPENSSL_indirect_call,@function
280 .align 16
281 OPENSSL_indirect_call:
282 .L_OPENSSL_indirect_call_begin:
283 pushl %ebp
284 movl %esp,%ebp
285 subl $28,%esp
286 movl 12(%ebp),%ecx
287 movl %ecx,(%esp)
288 movl 16(%ebp),%edx
289 movl %edx,4(%esp)
290 movl 20(%ebp),%eax
291 movl %eax,8(%esp)
292 movl 24(%ebp),%eax
293 movl %eax,12(%esp)
294 movl 28(%ebp),%eax
295 movl %eax,16(%esp)
296 movl 32(%ebp),%eax
297 movl %eax,20(%esp)
298 movl 36(%ebp),%eax
299 movl %eax,24(%esp)
300 call *8(%ebp)
301 movl %ebp,%esp
302 popl %ebp
303 ret
304 .size OPENSSL_indirect_call,.-.L_OPENSSL_indirect_call_begin
305 .globl OPENSSL_ia32_rdrand
306 .hidden OPENSSL_ia32_rdrand
307 .type OPENSSL_ia32_rdrand,@function
308 .align 16
309 OPENSSL_ia32_rdrand:
310 .L_OPENSSL_ia32_rdrand_begin:
311 movl $8,%ecx
312 .L019loop:
313 .byte 15,199,240
314 jc .L020break
315 loop .L019loop
316 .L020break:
317 cmpl $0,%eax
318 cmovel %ecx,%eax
319 ret
320 .size OPENSSL_ia32_rdrand,.-.L_OPENSSL_ia32_rdrand_begin
321 .hidden OPENSSL_ia32cap_P
322 #endif
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698