[arm64] Fix GCC build warnings.

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 2231 matching lines @@
   Emit(kArm64Float64InsertHighWord32, g.DefineAsRegister(node),
        g.UseRegister(left), g.UseRegister(right));
 }
 
 void InstructionSelector::VisitAtomicLoad(Node* node) {
   LoadRepresentation load_rep = LoadRepresentationOf(node->op());
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
   ArchOpcode opcode = kArchNop;
-  ImmediateMode immediate_mode = kNoImmediate;
   switch (load_rep.representation()) {
     case MachineRepresentation::kWord8:
       opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
-      immediate_mode = kLoadStoreImm8;
       break;
     case MachineRepresentation::kWord16:
       opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
-      immediate_mode = kLoadStoreImm16;
       break;
     case MachineRepresentation::kWord32:
       opcode = kAtomicLoadWord32;
-      immediate_mode = kLoadStoreImm32;
       break;
     default:
       UNREACHABLE();
       return;
   }
   Emit(opcode | AddressingModeField::encode(kMode_MRR),
        g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
 }
 
 // static
@@ skipping 15 matching lines @@
          MachineOperatorBuilder::kWord32ShiftIsSafe |
          MachineOperatorBuilder::kInt32DivIsSafe |
          MachineOperatorBuilder::kUint32DivIsSafe |
          MachineOperatorBuilder::kWord32ReverseBits |
          MachineOperatorBuilder::kWord64ReverseBits;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8