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| 1 // Copyright 2015 the V8 project authors. All rights reserved. | 1 // Copyright 2015 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
| 6 | 6 |
| 7 #include "src/ast/scopes.h" | 7 #include "src/ast/scopes.h" |
| 8 #include "src/compiler/code-generator-impl.h" | 8 #include "src/compiler/code-generator-impl.h" |
| 9 #include "src/compiler/gap-resolver.h" | 9 #include "src/compiler/gap-resolver.h" |
| 10 #include "src/compiler/node-matchers.h" | 10 #include "src/compiler/node-matchers.h" |
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| 445 | 445 |
| 446 #define ASSEMBLE_STORE_INTEGER(asm_instr) \ | 446 #define ASSEMBLE_STORE_INTEGER(asm_instr) \ |
| 447 do { \ | 447 do { \ |
| 448 size_t index = 0; \ | 448 size_t index = 0; \ |
| 449 AddressingMode mode = kMode_None; \ | 449 AddressingMode mode = kMode_None; \ |
| 450 MemOperand operand = i.MemoryOperand(&mode, &index); \ | 450 MemOperand operand = i.MemoryOperand(&mode, &index); \ |
| 451 Register value = i.InputRegister(index); \ | 451 Register value = i.InputRegister(index); \ |
| 452 __ asm_instr(value, operand); \ | 452 __ asm_instr(value, operand); \ |
| 453 } while (0) | 453 } while (0) |
| 454 | 454 |
| 455 #if V8_TARGET_ARCH_S390X | |
|
JoranSiu
2016/04/26 20:37:48
Should we make this in macro asm?
| |
| 456 // TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits. | |
| 457 #define CleanUInt32(x) __ llgfr(x, x) | |
| 458 #else | |
| 459 #define CleanUInt32(x) | |
| 460 #endif | |
| 461 | |
| 455 #define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, width) \ | 462 #define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, width) \ |
| 456 do { \ | 463 do { \ |
| 457 DoubleRegister result = i.OutputDoubleRegister(); \ | 464 DoubleRegister result = i.OutputDoubleRegister(); \ |
| 458 size_t index = 0; \ | 465 size_t index = 0; \ |
| 459 AddressingMode mode = kMode_None; \ | 466 AddressingMode mode = kMode_None; \ |
| 460 MemOperand operand = i.MemoryOperand(&mode, index); \ | 467 MemOperand operand = i.MemoryOperand(&mode, index); \ |
| 461 Register offset = operand.rb(); \ | 468 Register offset = operand.rb(); \ |
| 462 if (HasRegisterInput(instr, 2)) { \ | 469 if (HasRegisterInput(instr, 2)) { \ |
| 463 __ CmpLogical32(offset, i.InputRegister(2)); \ | 470 __ CmpLogical32(offset, i.InputRegister(2)); \ |
| 464 } else { \ | 471 } else { \ |
| 465 __ CmpLogical32(offset, i.InputImmediate(2)); \ | 472 __ CmpLogical32(offset, i.InputImmediate(2)); \ |
| 466 } \ | 473 } \ |
| 467 auto ool = new (zone()) OutOfLineLoadNAN##width(this, result); \ | 474 auto ool = new (zone()) OutOfLineLoadNAN##width(this, result); \ |
| 468 __ bge(ool->entry()); \ | 475 __ bge(ool->entry()); \ |
| 476 CleanUInt32(offset); \ | |
| 469 __ asm_instr(result, operand); \ | 477 __ asm_instr(result, operand); \ |
| 470 __ bind(ool->exit()); \ | 478 __ bind(ool->exit()); \ |
| 471 } while (0) | 479 } while (0) |
| 472 | 480 |
| 473 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \ | 481 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \ |
| 474 do { \ | 482 do { \ |
| 475 Register result = i.OutputRegister(); \ | 483 Register result = i.OutputRegister(); \ |
| 476 size_t index = 0; \ | 484 size_t index = 0; \ |
| 477 AddressingMode mode = kMode_None; \ | 485 AddressingMode mode = kMode_None; \ |
| 478 MemOperand operand = i.MemoryOperand(&mode, index); \ | 486 MemOperand operand = i.MemoryOperand(&mode, index); \ |
| 479 Register offset = operand.rb(); \ | 487 Register offset = operand.rb(); \ |
| 480 if (HasRegisterInput(instr, 2)) { \ | 488 if (HasRegisterInput(instr, 2)) { \ |
| 481 __ CmpLogical32(offset, i.InputRegister(2)); \ | 489 __ CmpLogical32(offset, i.InputRegister(2)); \ |
| 482 } else { \ | 490 } else { \ |
| 483 __ CmpLogical32(offset, i.InputImmediate(2)); \ | 491 __ CmpLogical32(offset, i.InputImmediate(2)); \ |
| 484 } \ | 492 } \ |
| 485 auto ool = new (zone()) OutOfLineLoadZero(this, result); \ | 493 auto ool = new (zone()) OutOfLineLoadZero(this, result); \ |
| 486 __ bge(ool->entry()); \ | 494 __ bge(ool->entry()); \ |
| 495 CleanUInt32(offset); \ | |
| 487 __ asm_instr(result, operand); \ | 496 __ asm_instr(result, operand); \ |
| 488 __ bind(ool->exit()); \ | 497 __ bind(ool->exit()); \ |
| 489 } while (0) | 498 } while (0) |
| 490 | 499 |
| 491 #define ASSEMBLE_CHECKED_STORE_FLOAT32() \ | 500 #define ASSEMBLE_CHECKED_STORE_FLOAT32() \ |
| 492 do { \ | 501 do { \ |
| 493 Label done; \ | 502 Label done; \ |
| 494 size_t index = 0; \ | 503 size_t index = 0; \ |
| 495 AddressingMode mode = kMode_None; \ | 504 AddressingMode mode = kMode_None; \ |
| 496 MemOperand operand = i.MemoryOperand(&mode, index); \ | 505 MemOperand operand = i.MemoryOperand(&mode, index); \ |
| 497 Register offset = operand.rb(); \ | 506 Register offset = operand.rb(); \ |
| 498 if (HasRegisterInput(instr, 2)) { \ | 507 if (HasRegisterInput(instr, 2)) { \ |
| 499 __ CmpLogical32(offset, i.InputRegister(2)); \ | 508 __ CmpLogical32(offset, i.InputRegister(2)); \ |
| 500 } else { \ | 509 } else { \ |
| 501 __ CmpLogical32(offset, i.InputImmediate(2)); \ | 510 __ CmpLogical32(offset, i.InputImmediate(2)); \ |
| 502 } \ | 511 } \ |
| 503 __ bge(&done); \ | 512 __ bge(&done); \ |
| 504 DoubleRegister value = i.InputDoubleRegister(3); \ | 513 DoubleRegister value = i.InputDoubleRegister(3); \ |
| 514 CleanUInt32(offset); \ | |
| 505 __ StoreFloat32(value, operand); \ | 515 __ StoreFloat32(value, operand); \ |
| 506 __ bind(&done); \ | 516 __ bind(&done); \ |
| 507 } while (0) | 517 } while (0) |
| 508 | 518 |
| 509 #define ASSEMBLE_CHECKED_STORE_DOUBLE() \ | 519 #define ASSEMBLE_CHECKED_STORE_DOUBLE() \ |
| 510 do { \ | 520 do { \ |
| 511 Label done; \ | 521 Label done; \ |
| 512 size_t index = 0; \ | 522 size_t index = 0; \ |
| 513 AddressingMode mode = kMode_None; \ | 523 AddressingMode mode = kMode_None; \ |
| 514 MemOperand operand = i.MemoryOperand(&mode, index); \ | 524 MemOperand operand = i.MemoryOperand(&mode, index); \ |
| 515 DCHECK_EQ(kMode_MRR, mode); \ | 525 DCHECK_EQ(kMode_MRR, mode); \ |
| 516 Register offset = operand.rb(); \ | 526 Register offset = operand.rb(); \ |
| 517 if (HasRegisterInput(instr, 2)) { \ | 527 if (HasRegisterInput(instr, 2)) { \ |
| 518 __ CmpLogical32(offset, i.InputRegister(2)); \ | 528 __ CmpLogical32(offset, i.InputRegister(2)); \ |
| 519 } else { \ | 529 } else { \ |
| 520 __ CmpLogical32(offset, i.InputImmediate(2)); \ | 530 __ CmpLogical32(offset, i.InputImmediate(2)); \ |
| 521 } \ | 531 } \ |
| 522 __ bge(&done); \ | 532 __ bge(&done); \ |
| 523 DoubleRegister value = i.InputDoubleRegister(3); \ | 533 DoubleRegister value = i.InputDoubleRegister(3); \ |
| 534 CleanUInt32(offset); \ | |
| 524 __ StoreDouble(value, operand); \ | 535 __ StoreDouble(value, operand); \ |
| 525 __ bind(&done); \ | 536 __ bind(&done); \ |
| 526 } while (0) | 537 } while (0) |
| 527 | 538 |
| 528 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \ | 539 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \ |
| 529 do { \ | 540 do { \ |
| 530 Label done; \ | 541 Label done; \ |
| 531 size_t index = 0; \ | 542 size_t index = 0; \ |
| 532 AddressingMode mode = kMode_None; \ | 543 AddressingMode mode = kMode_None; \ |
| 533 MemOperand operand = i.MemoryOperand(&mode, index); \ | 544 MemOperand operand = i.MemoryOperand(&mode, index); \ |
| 534 Register offset = operand.rb(); \ | 545 Register offset = operand.rb(); \ |
| 535 if (HasRegisterInput(instr, 2)) { \ | 546 if (HasRegisterInput(instr, 2)) { \ |
| 536 __ CmpLogical32(offset, i.InputRegister(2)); \ | 547 __ CmpLogical32(offset, i.InputRegister(2)); \ |
| 537 } else { \ | 548 } else { \ |
| 538 __ CmpLogical32(offset, i.InputImmediate(2)); \ | 549 __ CmpLogical32(offset, i.InputImmediate(2)); \ |
| 539 } \ | 550 } \ |
| 540 __ bge(&done); \ | 551 __ bge(&done); \ |
| 541 Register value = i.InputRegister(3); \ | 552 Register value = i.InputRegister(3); \ |
| 553 CleanUInt32(offset); \ | |
| 542 __ asm_instr(value, operand); \ | 554 __ asm_instr(value, operand); \ |
| 543 __ bind(&done); \ | 555 __ bind(&done); \ |
| 544 } while (0) | 556 } while (0) |
| 545 | 557 |
| 546 void CodeGenerator::AssembleDeconstructFrame() { | 558 void CodeGenerator::AssembleDeconstructFrame() { |
| 547 __ LeaveFrame(StackFrame::MANUAL); | 559 __ LeaveFrame(StackFrame::MANUAL); |
| 548 } | 560 } |
| 549 | 561 |
| 550 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) { | 562 void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) { |
| 551 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta); | 563 int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta); |
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| 2112 padding_size -= 2; | 2124 padding_size -= 2; |
| 2113 } | 2125 } |
| 2114 } | 2126 } |
| 2115 } | 2127 } |
| 2116 | 2128 |
| 2117 #undef __ | 2129 #undef __ |
| 2118 | 2130 |
| 2119 } // namespace compiler | 2131 } // namespace compiler |
| 2120 } // namespace internal | 2132 } // namespace internal |
| 2121 } // namespace v8 | 2133 } // namespace v8 |
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