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Unified Diff: src/compiler/ppc/code-generator-ppc.cc

Issue 1919003004: PPC64: [turbofan] Fix checked loads/stores. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 8 months ago
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Index: src/compiler/ppc/code-generator-ppc.cc
diff --git a/src/compiler/ppc/code-generator-ppc.cc b/src/compiler/ppc/code-generator-ppc.cc
index 47df565bb1ba475e328265de95a4b50ec1866ce2..34a66fd6bd0713058963a30d04b2c637feb8d8dd 100644
--- a/src/compiler/ppc/code-generator-ppc.cc
+++ b/src/compiler/ppc/code-generator-ppc.cc
@@ -525,6 +525,12 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
+#if V8_TARGET_ARCH_PPC64
+// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
+#define CleanUInt32(x) __ ClearLeftImm(x, x, Operand(32))
+#else
+#define CleanUInt32(x)
+#endif
#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, asm_instrx, width) \
do { \
@@ -544,13 +550,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ asm_instr(result, operand); \
} else { \
+ CleanUInt32(offset); \
__ asm_instrx(result, operand); \
} \
__ bind(ool->exit()); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
-
#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr, asm_instrx) \
do { \
Register result = i.OutputRegister(); \
@@ -569,13 +575,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ asm_instr(result, operand); \
} else { \
+ CleanUInt32(offset); \
__ asm_instrx(result, operand); \
} \
__ bind(ool->exit()); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
-
#define ASSEMBLE_CHECKED_STORE_FLOAT32() \
do { \
Label done; \
@@ -595,13 +601,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ stfs(kScratchDoubleReg, operand); \
} else { \
+ CleanUInt32(offset); \
__ stfsx(kScratchDoubleReg, operand); \
} \
__ bind(&done); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
-
#define ASSEMBLE_CHECKED_STORE_DOUBLE() \
do { \
Label done; \
@@ -620,13 +626,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ stfd(value, operand); \
} else { \
+ CleanUInt32(offset); \
__ stfdx(value, operand); \
} \
__ bind(&done); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
-
#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr, asm_instrx) \
do { \
Label done; \
@@ -645,6 +651,7 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ asm_instr(value, operand); \
} else { \
+ CleanUInt32(offset); \
__ asm_instrx(value, operand); \
} \
__ bind(&done); \
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