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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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930 void idivq(Register src); | 930 void idivq(Register src); |
931 // Divide edx:eax by lower 32 bits of src. Quotient in eax, rem. in edx. | 931 // Divide edx:eax by lower 32 bits of src. Quotient in eax, rem. in edx. |
932 void idivl(Register src); | 932 void idivl(Register src); |
933 | 933 |
934 // Signed multiply instructions. | 934 // Signed multiply instructions. |
935 void imul(Register src); // rdx:rax = rax * src. | 935 void imul(Register src); // rdx:rax = rax * src. |
936 void imul(Register dst, Register src); // dst = dst * src. | 936 void imul(Register dst, Register src); // dst = dst * src. |
937 void imul(Register dst, const Operand& src); // dst = dst * src. | 937 void imul(Register dst, const Operand& src); // dst = dst * src. |
938 void imul(Register dst, Register src, Immediate imm); // dst = src * imm. | 938 void imul(Register dst, Register src, Immediate imm); // dst = src * imm. |
939 // Signed 32-bit multiply instructions. | 939 // Signed 32-bit multiply instructions. |
| 940 void imull(Register src); // edx:eax = eax * src. |
940 void imull(Register dst, Register src); // dst = dst * src. | 941 void imull(Register dst, Register src); // dst = dst * src. |
941 void imull(Register dst, const Operand& src); // dst = dst * src. | 942 void imull(Register dst, const Operand& src); // dst = dst * src. |
942 void imull(Register dst, Register src, Immediate imm); // dst = src * imm. | 943 void imull(Register dst, Register src, Immediate imm); // dst = src * imm. |
943 | 944 |
944 void incq(Register dst); | 945 void incq(Register dst); |
945 void incq(const Operand& dst); | 946 void incq(const Operand& dst); |
946 void incl(Register dst); | 947 void incl(Register dst); |
947 void incl(const Operand& dst); | 948 void incl(const Operand& dst); |
948 | 949 |
949 void lea(Register dst, const Operand& src); | 950 void lea(Register dst, const Operand& src); |
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1735 private: | 1736 private: |
1736 Assembler* assembler_; | 1737 Assembler* assembler_; |
1737 #ifdef DEBUG | 1738 #ifdef DEBUG |
1738 int space_before_; | 1739 int space_before_; |
1739 #endif | 1740 #endif |
1740 }; | 1741 }; |
1741 | 1742 |
1742 } } // namespace v8::internal | 1743 } } // namespace v8::internal |
1743 | 1744 |
1744 #endif // V8_X64_ASSEMBLER_X64_H_ | 1745 #endif // V8_X64_ASSEMBLER_X64_H_ |
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