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Issue 191233003: Add out-of-line constant pool support to Arm. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Addresss comments Created 6 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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4820 4820
4821 *stack_depth = 0; 4821 *stack_depth = 0;
4822 *context_length = 0; 4822 *context_length = 0;
4823 return previous_; 4823 return previous_;
4824 } 4824 }
4825 4825
4826 4826
4827 #undef __ 4827 #undef __
4828 4828
4829 4829
4830 static const int32_t kBranchBeforeInterrupt = 0x5a000004; 4830 static Address GetInterruptImmediateLoadAddress(Address pc) {
4831 Address load_address = pc - 2 * Assembler::kInstrSize;
4832 if (!FLAG_enable_ool_constant_pool) {
4833 ASSERT(Assembler::IsLdrPcImmediateOffset(Memory::int32_at(load_address)));
4834 } else if (Assembler::IsMovT(Memory::int32_at(load_address))) {
4835 load_address -= Assembler::kInstrSize;
4836 ASSERT(Assembler::IsMovW(Memory::int32_at(load_address)));
4837 } else {
4838 ASSERT(Assembler::IsLdrPpImmediateOffset(Memory::int32_at(load_address)));
4839 }
4840 return load_address;
4841 }
4831 4842
4832 4843
4833 void BackEdgeTable::PatchAt(Code* unoptimized_code, 4844 void BackEdgeTable::PatchAt(Code* unoptimized_code,
4834 Address pc, 4845 Address pc,
4835 BackEdgeState target_state, 4846 BackEdgeState target_state,
4836 Code* replacement_code) { 4847 Code* replacement_code) {
4837 static const int kInstrSize = Assembler::kInstrSize; 4848 static const int kInstrSize = Assembler::kInstrSize;
4838 Address branch_address = pc - 3 * kInstrSize; 4849 Address pc_immediate_load_address = GetInterruptImmediateLoadAddress(pc);
4850 Address branch_address = pc_immediate_load_address - kInstrSize;
4839 CodePatcher patcher(branch_address, 1); 4851 CodePatcher patcher(branch_address, 1);
4840
4841 switch (target_state) { 4852 switch (target_state) {
4842 case INTERRUPT: 4853 case INTERRUPT:
4854 {
4843 // <decrement profiling counter> 4855 // <decrement profiling counter>
4844 // 2a 00 00 01 bpl ok 4856 // bpl ok
4845 // e5 9f c? ?? ldr ip, [pc, <interrupt stub address>] 4857 // ; load interrupt stub address into ip - either of:
4846 // e1 2f ff 3c blx ip 4858 // ldr ip, [pc/pp, <constant pool offset>] | movw ip, <immed low>
4859 // | movt ip, <immed high>
4860 // blx ip
4847 // ok-label 4861 // ok-label
4848 patcher.masm()->b(4 * kInstrSize, pl); // Jump offset is 4 instructions. 4862
4849 ASSERT_EQ(kBranchBeforeInterrupt, Memory::int32_at(branch_address)); 4863 // Calculate branch offet to the ok-label - this is the difference between
4864 // the branch address and |pc| (which points at <blx ip>) plus one instr.
4865 int branch_offset = pc + kInstrSize - branch_address;
4866 patcher.masm()->b(branch_offset, pl);
4850 break; 4867 break;
4868 }
4851 case ON_STACK_REPLACEMENT: 4869 case ON_STACK_REPLACEMENT:
4852 case OSR_AFTER_STACK_CHECK: 4870 case OSR_AFTER_STACK_CHECK:
4853 // <decrement profiling counter> 4871 // <decrement profiling counter>
4854 // e1 a0 00 00 mov r0, r0 (NOP) 4872 // mov r0, r0 (NOP)
4855 // e5 9f c? ?? ldr ip, [pc, <on-stack replacement address>] 4873 // ; load on-stack replacement address into ip - either of:
4856 // e1 2f ff 3c blx ip 4874 // ldr ip, [pc/pp, <constant pool offset>] | movw ip, <immed low>
4875 // | movt ip, <immed high>
4876 // blx ip
4857 // ok-label 4877 // ok-label
4858 patcher.masm()->nop(); 4878 patcher.masm()->nop();
4859 break; 4879 break;
4860 } 4880 }
4861 4881
4862 Address pc_immediate_load_address = pc - 2 * kInstrSize; 4882 Assembler::set_target_address_at(pc_immediate_load_address, unoptimized_code,
4863 // Replace the call address. 4883 replacement_code->entry());
4864 uint32_t interrupt_address_offset =
4865 Memory::uint16_at(pc_immediate_load_address) & 0xfff;
4866 Address interrupt_address_pointer = pc + interrupt_address_offset;
4867 Memory::uint32_at(interrupt_address_pointer) =
4868 reinterpret_cast<uint32_t>(replacement_code->entry());
4869 4884
4870 unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch( 4885 unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch(
4871 unoptimized_code, pc_immediate_load_address, replacement_code); 4886 unoptimized_code, pc_immediate_load_address, replacement_code);
4872 } 4887 }
4873 4888
4874 4889
4875 BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState( 4890 BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState(
4876 Isolate* isolate, 4891 Isolate* isolate,
4877 Code* unoptimized_code, 4892 Code* unoptimized_code,
4878 Address pc) { 4893 Address pc) {
4879 static const int kInstrSize = Assembler::kInstrSize; 4894 static const int kInstrSize = Assembler::kInstrSize;
4880 ASSERT(Memory::int32_at(pc - kInstrSize) == kBlxIp); 4895 ASSERT(Memory::int32_at(pc - kInstrSize) == kBlxIp);
4881 4896
4882 Address branch_address = pc - 3 * kInstrSize; 4897 Address pc_immediate_load_address = GetInterruptImmediateLoadAddress(pc);
4883 Address pc_immediate_load_address = pc - 2 * kInstrSize; 4898 Address branch_address = pc_immediate_load_address - kInstrSize;
4884 uint32_t interrupt_address_offset = 4899 Address interrupt_address = Assembler::target_address_at(
4885 Memory::uint16_at(pc_immediate_load_address) & 0xfff; 4900 pc_immediate_load_address, unoptimized_code);
4886 Address interrupt_address_pointer = pc + interrupt_address_offset;
4887 4901
4888 if (Memory::int32_at(branch_address) == kBranchBeforeInterrupt) { 4902 if (Assembler::IsBranch(Assembler::instr_at(branch_address))) {
4889 ASSERT(Memory::uint32_at(interrupt_address_pointer) == 4903 ASSERT(interrupt_address ==
4890 reinterpret_cast<uint32_t>( 4904 isolate->builtins()->InterruptCheck()->entry());
4891 isolate->builtins()->InterruptCheck()->entry()));
4892 ASSERT(Assembler::IsLdrPcImmediateOffset(
4893 Assembler::instr_at(pc_immediate_load_address)));
4894 return INTERRUPT; 4905 return INTERRUPT;
4895 } 4906 }
4896 4907
4897 ASSERT(Assembler::IsNop(Assembler::instr_at(branch_address))); 4908 ASSERT(Assembler::IsNop(Assembler::instr_at(branch_address)));
4898 ASSERT(Assembler::IsLdrPcImmediateOffset(
4899 Assembler::instr_at(pc_immediate_load_address)));
4900 4909
4901 if (Memory::uint32_at(interrupt_address_pointer) == 4910 if (interrupt_address ==
4902 reinterpret_cast<uint32_t>( 4911 isolate->builtins()->OnStackReplacement()->entry()) {
4903 isolate->builtins()->OnStackReplacement()->entry())) {
4904 return ON_STACK_REPLACEMENT; 4912 return ON_STACK_REPLACEMENT;
4905 } 4913 }
4906 4914
4907 ASSERT(Memory::uint32_at(interrupt_address_pointer) == 4915 ASSERT(interrupt_address ==
4908 reinterpret_cast<uint32_t>( 4916 isolate->builtins()->OsrAfterStackCheck()->entry());
4909 isolate->builtins()->OsrAfterStackCheck()->entry()));
4910 return OSR_AFTER_STACK_CHECK; 4917 return OSR_AFTER_STACK_CHECK;
4911 } 4918 }
4912 4919
4913 4920
4914 } } // namespace v8::internal 4921 } } // namespace v8::internal
4915 4922
4916 #endif // V8_TARGET_ARCH_ARM 4923 #endif // V8_TARGET_ARCH_ARM
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