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Side by Side Diff: src/compiler/ppc/instruction-codes-ppc.h

Issue 1910123002: PPC64: [turbofan] Word32 loads should be unsigned. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 94 matching lines...) Expand 10 before | Expand all | Expand 10 after
105 V(PPC_DoubleConstruct) \ 105 V(PPC_DoubleConstruct) \
106 V(PPC_BitcastInt32ToFloat32) \ 106 V(PPC_BitcastInt32ToFloat32) \
107 V(PPC_BitcastFloat32ToInt32) \ 107 V(PPC_BitcastFloat32ToInt32) \
108 V(PPC_BitcastInt64ToDouble) \ 108 V(PPC_BitcastInt64ToDouble) \
109 V(PPC_BitcastDoubleToInt64) \ 109 V(PPC_BitcastDoubleToInt64) \
110 V(PPC_LoadWordS8) \ 110 V(PPC_LoadWordS8) \
111 V(PPC_LoadWordU8) \ 111 V(PPC_LoadWordU8) \
112 V(PPC_LoadWordS16) \ 112 V(PPC_LoadWordS16) \
113 V(PPC_LoadWordU16) \ 113 V(PPC_LoadWordU16) \
114 V(PPC_LoadWordS32) \ 114 V(PPC_LoadWordS32) \
115 V(PPC_LoadWordU32) \
115 V(PPC_LoadWord64) \ 116 V(PPC_LoadWord64) \
116 V(PPC_LoadFloat32) \ 117 V(PPC_LoadFloat32) \
117 V(PPC_LoadDouble) \ 118 V(PPC_LoadDouble) \
118 V(PPC_StoreWord8) \ 119 V(PPC_StoreWord8) \
119 V(PPC_StoreWord16) \ 120 V(PPC_StoreWord16) \
120 V(PPC_StoreWord32) \ 121 V(PPC_StoreWord32) \
121 V(PPC_StoreWord64) \ 122 V(PPC_StoreWord64) \
122 V(PPC_StoreFloat32) \ 123 V(PPC_StoreFloat32) \
123 V(PPC_StoreDouble) 124 V(PPC_StoreDouble)
124 125
(...skipping 12 matching lines...) Expand all
137 // MRR = [register + register] 138 // MRR = [register + register]
138 #define TARGET_ADDRESSING_MODE_LIST(V) \ 139 #define TARGET_ADDRESSING_MODE_LIST(V) \
139 V(MRI) /* [%r0 + K] */ \ 140 V(MRI) /* [%r0 + K] */ \
140 V(MRR) /* [%r0 + %r1] */ 141 V(MRR) /* [%r0 + %r1] */
141 142
142 } // namespace compiler 143 } // namespace compiler
143 } // namespace internal 144 } // namespace internal
144 } // namespace v8 145 } // namespace v8
145 146
146 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 147 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
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