Subzero: Fix srem.i8/urem.i8 lowering for x86-64.

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 2290 matching lines @@
       break;
     case IceType_i8:
       Eax = Traits::RegisterSet::Reg_al;
       Edx = Traits::RegisterSet::Reg_ah;
       break;
     }
     T_edx = makeReg(Ty, Edx);
     _mov(T_edx, Ctx->getConstantZero(Ty));
     _mov(T, Src0, Eax);
     _div(T_edx, Src1, T);
+    if (Ty == IceType_i8) {
+      // Register ah must be moved into one of {al,bl,cl,dl} before it can be
+      // moved into a general 8-bit register.
+      auto *T_AhRcvr = makeReg(Ty);
+      T_AhRcvr->setRegClass(RCX86_IsAhRcvr);
+      _mov(T_AhRcvr, T_edx);
+      T_edx = T_AhRcvr;
+    }
     _mov(Dest, T_edx);
   } break;
   case InstArithmetic::Srem: {
     // TODO(stichnot): Enable this after doing better performance and cross
     // testing.
     if (false && Func->getOptLevel() >= Opt_1) {
       // Optimize mod by constant power of 2, but not for Om1 or O0, just to
       // keep things simple there.
       if (auto *C = llvm::dyn_cast<ConstantInteger32>(Src1)) {
         const int32_t Divisor = C->getValue();
@@ skipping 49 matching lines @@
       break;
     case IceType_i8:
       Eax = Traits::RegisterSet::Reg_al;
       Edx = Traits::RegisterSet::Reg_ah;
       break;
     }
     T_edx = makeReg(Ty, Edx);
     _mov(T, Src0, Eax);
     _cbwdq(T_edx, T);
     _idiv(T_edx, Src1, T);
+    if (Ty == IceType_i8) {
+      // Register ah must be moved into one of {al,bl,cl,dl} before it can be
+      // moved into a general 8-bit register.
+      auto *T_AhRcvr = makeReg(Ty);
+      T_AhRcvr->setRegClass(RCX86_IsAhRcvr);
+      _mov(T_AhRcvr, T_edx);
+      T_edx = T_AhRcvr;
+    }
     _mov(Dest, T_edx);
   } break;
   case InstArithmetic::Fadd:
     _mov(T, Src0);
     _addss(T, Src1);
     _mov(Dest, T);
     break;
   case InstArithmetic::Fsub:
     _mov(T, Src0);
     _subss(T, Src1);
@@ skipping 5033 matching lines @@
         emitGlobal(*Var, SectionSuffix);
       }
     }
   } break;
   }
 }
 } // end of namespace X86NAMESPACE
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H