Index: unittest/AssemblerX8632/XmmArith.cpp |
diff --git a/unittest/AssemblerX8632/XmmArith.cpp b/unittest/AssemblerX8632/XmmArith.cpp |
index cf05b7916c93dab9a73715885ada797d1a8210f4..d19fcb83a14dc97f0cc517f666c51e6ce9a1720e 100644 |
--- a/unittest/AssemblerX8632/XmmArith.cpp |
+++ b/unittest/AssemblerX8632/XmmArith.cpp |
@@ -995,33 +995,79 @@ TEST_F(AssemblerX8632Test, Shufp) { |
reset(); \ |
} while (0) |
-#define TestImplSingleXmmXmmUntyped(Dst, Src, Inst) \ |
+#define TestImpl(Dst, Src) \ |
do { \ |
- static constexpr char TestString[] = \ |
- "(" #Dst ", " #Src ", " #Inst ", Untyped)"; \ |
+ TestImplSingleXmmXmm(Dst, Src, pshufd); \ |
+ TestImplSingleXmmAddr(Dst, pshufd); \ |
+ TestImplSingleXmmXmm(Dst, Src, shufps); \ |
+ TestImplSingleXmmAddr(Dst, shufps); \ |
+ } while (0) |
+ |
+ TestImpl(xmm0, xmm1); |
+ TestImpl(xmm1, xmm2); |
+ TestImpl(xmm2, xmm3); |
+ TestImpl(xmm3, xmm4); |
+ TestImpl(xmm4, xmm5); |
+ TestImpl(xmm5, xmm6); |
+ TestImpl(xmm6, xmm7); |
+ TestImpl(xmm7, xmm0); |
+ |
+#undef TestImpl |
+#undef TestImplSingleXmmAddr |
+#undef TestImplSingleXmmXmm |
+} |
+ |
+TEST_F(AssemblerX8632Test, Punpckldq) { |
+ const Dqword V0(uint64_t(0x1111111122222222ull), |
+ uint64_t(0x5555555577777777ull)); |
+ const Dqword V1(uint64_t(0xAAAAAAAABBBBBBBBull), |
+ uint64_t(0xCCCCCCCCDDDDDDDDull)); |
+ |
+ const Dqword Expected(uint64_t(0xBBBBBBBB22222222ull), |
+ uint64_t(0xAAAAAAAA11111111ull)); |
+ |
+#define TestImplXmmXmm(Dst, Src, Inst) \ |
+ do { \ |
+ static constexpr char TestString[] = "(" #Dst ", " #Src ", " #Inst ")"; \ |
const uint32_t T0 = allocateDqword(); \ |
const uint32_t T1 = allocateDqword(); \ |
\ |
__ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \ |
__ movups(XmmRegister::Encoded_Reg_##Src, dwordAddress(T1)); \ |
- __ Inst(XmmRegister::Encoded_Reg_##Dst, XmmRegister::Encoded_Reg_##Src, \ |
- Immediate(Inst##Imm)); \ |
+ __ Inst(IceType_void, XmmRegister::Encoded_Reg_##Dst, \ |
+ XmmRegister::Encoded_Reg_##Src); \ |
+ \ |
+ AssembledTest test = assemble(); \ |
+ test.setDqwordTo(T0, V0); \ |
+ test.setDqwordTo(T1, V1); \ |
+ test.run(); \ |
+ \ |
+ ASSERT_EQ(Expected, test.Dst<Dqword>()) << TestString; \ |
+ reset(); \ |
+ } while (0) |
+ |
+#define TestImplXmmAddr(Dst, Inst) \ |
+ do { \ |
+ static constexpr char TestString[] = "(" #Dst ", Addr, " #Inst ")"; \ |
+ const uint32_t T0 = allocateDqword(); \ |
+ const uint32_t T1 = allocateDqword(); \ |
+ \ |
+ __ movups(XmmRegister::Encoded_Reg_##Dst, dwordAddress(T0)); \ |
+ __ Inst(IceType_void, XmmRegister::Encoded_Reg_##Dst, dwordAddress(T1)); \ |
\ |
AssembledTest test = assemble(); \ |
test.setDqwordTo(T0, V0); \ |
test.setDqwordTo(T1, V1); \ |
test.run(); \ |
\ |
- ASSERT_EQ(Inst##UntypedExpected, test.Dst<Dqword>()) << TestString; \ |
+ ASSERT_EQ(Expected, test.Dst<Dqword>()) << TestString; \ |
reset(); \ |
} while (0) |
#define TestImpl(Dst, Src) \ |
do { \ |
- TestImplSingleXmmXmm(Dst, Src, pshufd); \ |
- TestImplSingleXmmAddr(Dst, pshufd); \ |
- TestImplSingleXmmXmm(Dst, Src, shufps); \ |
- TestImplSingleXmmAddr(Dst, shufps); \ |
+ TestImplXmmXmm(Dst, Src, punpckldq); \ |
+ TestImplXmmAddr(Dst, punpckldq); \ |
} while (0) |
TestImpl(xmm0, xmm1); |
@@ -1034,9 +1080,8 @@ TEST_F(AssemblerX8632Test, Shufp) { |
TestImpl(xmm7, xmm0); |
#undef TestImpl |
-#undef TestImplSingleXmmXmmUntyped |
-#undef TestImplSingleXmmAddr |
-#undef TestImplSingleXmmXmm |
+#undef TestImplXmmAddr |
+#undef TestImplXmmXmm |
} |
TEST_F(AssemblerX8632Test, Cvt) { |