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Side by Side Diff: src/IceInstX86Base.h

Issue 1909013002: Subzero. X86. Lowers shufflevector using xmm instructions. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: fixes 80-col Created 4 years, 7 months ago
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1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===// 1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 125 matching lines...) Expand 10 before | Expand all | Expand 10 after
136 Pblendvb, 136 Pblendvb,
137 Pcmpeq, 137 Pcmpeq,
138 Pcmpgt, 138 Pcmpgt,
139 Pextr, 139 Pextr,
140 Pinsr, 140 Pinsr,
141 Pmull, 141 Pmull,
142 Pmuludq, 142 Pmuludq,
143 Pop, 143 Pop,
144 Por, 144 Por,
145 Pshufd, 145 Pshufd,
146 Punpckl,
146 Psll, 147 Psll,
147 Psra, 148 Psra,
148 Psrl, 149 Psrl,
149 Psub, 150 Psub,
150 Push, 151 Push,
151 Pxor, 152 Pxor,
152 Ret, 153 Ret,
153 Rol, 154 Rol,
154 Sar, 155 Sar,
155 Sbb, 156 Sbb,
(...skipping 20 matching lines...) Expand all
176 Xor, 177 Xor,
177 Xorps, 178 Xorps,
178 XorRMW, 179 XorRMW,
179 180
180 /// Intel Architecture Code Analyzer markers. These are not executable so 181 /// Intel Architecture Code Analyzer markers. These are not executable so
181 /// must only be used for analysis. 182 /// must only be used for analysis.
182 IacaStart, 183 IacaStart,
183 IacaEnd 184 IacaEnd
184 }; 185 };
185 186
186 enum SseSuffix { None, Packed, Scalar, Integral }; 187 enum SseSuffix { None, Packed, Unpack, Scalar, Integral };
187 188
188 static const char *getWidthString(Type Ty); 189 static const char *getWidthString(Type Ty);
189 static const char *getFldString(Type Ty); 190 static const char *getFldString(Type Ty);
190 static BrCond getOppositeCondition(BrCond Cond); 191 static BrCond getOppositeCondition(BrCond Cond);
191 void dump(const Cfg *Func) const override; 192 void dump(const Cfg *Func) const override;
192 193
193 // Shared emit routines for common forms of instructions. 194 // Shared emit routines for common forms of instructions.
194 void emitTwoAddress(const Cfg *Func, const char *Opcode, 195 void emitTwoAddress(const Cfg *Func, const char *Opcode,
195 const char *Suffix = "") const; 196 const char *Suffix = "") const;
196 197
(...skipping 637 matching lines...) Expand 10 before | Expand all | Expand 10 after
834 const Type DestTy = ArithmeticTypeOverride == IceType_void 835 const Type DestTy = ArithmeticTypeOverride == IceType_void
835 ? this->getDest()->getType() 836 ? this->getDest()->getType()
836 : ArithmeticTypeOverride; 837 : ArithmeticTypeOverride;
837 const char *SuffixString = ""; 838 const char *SuffixString = "";
838 switch (Suffix) { 839 switch (Suffix) {
839 case InstX86Base::SseSuffix::None: 840 case InstX86Base::SseSuffix::None:
840 break; 841 break;
841 case InstX86Base::SseSuffix::Packed: 842 case InstX86Base::SseSuffix::Packed:
842 SuffixString = Traits::TypeAttributes[DestTy].PdPsString; 843 SuffixString = Traits::TypeAttributes[DestTy].PdPsString;
843 break; 844 break;
845 case InstX86Base::SseSuffix::Unpack:
846 SuffixString = Traits::TypeAttributes[DestTy].UnpackString;
847 break;
844 case InstX86Base::SseSuffix::Scalar: 848 case InstX86Base::SseSuffix::Scalar:
845 SuffixString = Traits::TypeAttributes[DestTy].SdSsString; 849 SuffixString = Traits::TypeAttributes[DestTy].SdSsString;
846 break; 850 break;
847 case InstX86Base::SseSuffix::Integral: 851 case InstX86Base::SseSuffix::Integral:
848 SuffixString = Traits::TypeAttributes[DestTy].PackString; 852 SuffixString = Traits::TypeAttributes[DestTy].PackString;
849 break; 853 break;
850 } 854 }
851 this->emitTwoAddress(Func, Opcode, SuffixString); 855 this->emitTwoAddress(Func, Opcode, SuffixString);
852 } 856 }
853 void emitIAS(const Cfg *Func) const override { 857 void emitIAS(const Cfg *Func) const override {
(...skipping 1978 matching lines...) Expand 10 before | Expand all | Expand 10 after
2832 void emit(const Cfg *Func) const override; 2836 void emit(const Cfg *Func) const override;
2833 void emitIAS(const Cfg *Func) const override; 2837 void emitIAS(const Cfg *Func) const override;
2834 void dump(const Cfg *Func) const override; 2838 void dump(const Cfg *Func) const override;
2835 static bool classof(const Inst *Instr) { 2839 static bool classof(const Inst *Instr) {
2836 return InstX86Base::isClassof(Instr, InstX86Base::IacaEnd); 2840 return InstX86Base::isClassof(Instr, InstX86Base::IacaEnd);
2837 } 2841 }
2838 2842
2839 private: 2843 private:
2840 InstX86IacaEnd(Cfg *Func); 2844 InstX86IacaEnd(Cfg *Func);
2841 }; 2845 };
2846
2847 class InstX86Punpckl
2848 : public InstX86BaseBinopXmm<InstX86Base::Punpckl, false,
2849 InstX86Base::SseSuffix::Unpack> {
2850 public:
2851 static InstX86Punpckl *create(Cfg *Func, Variable *Dest, Operand *Source) {
2852 return new (Func->allocate<InstX86Punpckl>())
2853 InstX86Punpckl(Func, Dest, Source);
2854 }
2855
2856 private:
2857 InstX86Punpckl(Cfg *Func, Variable *Dest, Operand *Source)
2858 : InstX86BaseBinopXmm<InstX86Base::Punpckl, false,
2859 InstX86Base::SseSuffix::Unpack>(Func, Dest,
2860 Source) {}
2861 };
2862
2842 }; // struct InstImpl 2863 }; // struct InstImpl
2843 2864
2844 /// struct Insts is a template that can be used to instantiate all the X86 2865 /// struct Insts is a template that can be used to instantiate all the X86
2845 /// instructions for a target with a simple 2866 /// instructions for a target with a simple
2846 /// 2867 ///
2847 /// using Insts = ::Ice::X86NAMESPACE::Insts<TraitsType>; 2868 /// using Insts = ::Ice::X86NAMESPACE::Insts<TraitsType>;
2848 template <typename TraitsType> struct Insts { 2869 template <typename TraitsType> struct Insts {
2849 using GetIP = typename InstImpl<TraitsType>::InstX86GetIP; 2870 using GetIP = typename InstImpl<TraitsType>::InstX86GetIP;
2850 using FakeRMW = typename InstImpl<TraitsType>::InstX86FakeRMW; 2871 using FakeRMW = typename InstImpl<TraitsType>::InstX86FakeRMW;
2851 using Label = typename InstImpl<TraitsType>::InstX86Label; 2872 using Label = typename InstImpl<TraitsType>::InstX86Label;
(...skipping 101 matching lines...) Expand 10 before | Expand all | Expand 10 after
2953 typename InstImpl<TraitsType>::InstX86Fstp>::type; 2974 typename InstImpl<TraitsType>::InstX86Fstp>::type;
2954 using Pop = typename InstImpl<TraitsType>::InstX86Pop; 2975 using Pop = typename InstImpl<TraitsType>::InstX86Pop;
2955 using Push = typename InstImpl<TraitsType>::InstX86Push; 2976 using Push = typename InstImpl<TraitsType>::InstX86Push;
2956 using Ret = typename InstImpl<TraitsType>::InstX86Ret; 2977 using Ret = typename InstImpl<TraitsType>::InstX86Ret;
2957 using Setcc = typename InstImpl<TraitsType>::InstX86Setcc; 2978 using Setcc = typename InstImpl<TraitsType>::InstX86Setcc;
2958 using Xadd = typename InstImpl<TraitsType>::InstX86Xadd; 2979 using Xadd = typename InstImpl<TraitsType>::InstX86Xadd;
2959 using Xchg = typename InstImpl<TraitsType>::InstX86Xchg; 2980 using Xchg = typename InstImpl<TraitsType>::InstX86Xchg;
2960 2981
2961 using IacaStart = typename InstImpl<TraitsType>::InstX86IacaStart; 2982 using IacaStart = typename InstImpl<TraitsType>::InstX86IacaStart;
2962 using IacaEnd = typename InstImpl<TraitsType>::InstX86IacaEnd; 2983 using IacaEnd = typename InstImpl<TraitsType>::InstX86IacaEnd;
2984
2985 using Punpckl = typename InstImpl<TraitsType>::InstX86Punpckl;
2963 }; 2986 };
2964 2987
2965 /// X86 Instructions have static data (particularly, opcodes and instruction 2988 /// X86 Instructions have static data (particularly, opcodes and instruction
2966 /// emitters). Each X86 target needs to define all of these, so this macro is 2989 /// emitters). Each X86 target needs to define all of these, so this macro is
2967 /// provided so that, if something changes, then all X86 targets will be updated 2990 /// provided so that, if something changes, then all X86 targets will be updated
2968 /// automatically. 2991 /// automatically.
2969 #define X86INSTS_DEFINE_STATIC_DATA(X86NAMESPACE, TraitsType) \ 2992 #define X86INSTS_DEFINE_STATIC_DATA(X86NAMESPACE, TraitsType) \
2970 namespace Ice { \ 2993 namespace Ice { \
2971 namespace X86NAMESPACE { \ 2994 namespace X86NAMESPACE { \
2972 /* In-place ops */ \ 2995 /* In-place ops */ \
(...skipping 209 matching lines...) Expand 10 before | Expand all | Expand 10 after
3182 template <> \ 3205 template <> \
3183 const char *InstImpl<TraitsType>::InstX86Pblendvb::Base::Opcode = \ 3206 const char *InstImpl<TraitsType>::InstX86Pblendvb::Base::Opcode = \
3184 "pblendvb"; \ 3207 "pblendvb"; \
3185 /* Three address ops */ \ 3208 /* Three address ops */ \
3186 template <> \ 3209 template <> \
3187 template <> \ 3210 template <> \
3188 const char *InstImpl<TraitsType>::InstX86Pextr::Base::Opcode = "pextr"; \ 3211 const char *InstImpl<TraitsType>::InstX86Pextr::Base::Opcode = "pextr"; \
3189 template <> \ 3212 template <> \
3190 template <> \ 3213 template <> \
3191 const char *InstImpl<TraitsType>::InstX86Pshufd::Base::Opcode = "pshufd"; \ 3214 const char *InstImpl<TraitsType>::InstX86Pshufd::Base::Opcode = "pshufd"; \
3215 template <> \
3216 template <> \
3217 const char *InstImpl<TraitsType>::InstX86Punpckl::Base::Opcode = "punpckl"; \
3192 /* Inplace GPR ops */ \ 3218 /* Inplace GPR ops */ \
3193 template <> \ 3219 template <> \
3194 template <> \ 3220 template <> \
3195 const InstImpl<TraitsType>::Assembler::GPREmitterOneOp \ 3221 const InstImpl<TraitsType>::Assembler::GPREmitterOneOp \
3196 InstImpl<TraitsType>::InstX86Bswap::Base::Emitter = { \ 3222 InstImpl<TraitsType>::InstX86Bswap::Base::Emitter = { \
3197 &InstImpl<TraitsType>::Assembler::bswap, \ 3223 &InstImpl<TraitsType>::Assembler::bswap, \
3198 nullptr /* only a reg form exists */ \ 3224 nullptr /* only a reg form exists */ \
3199 }; \ 3225 }; \
3200 template <> \ 3226 template <> \
3201 template <> \ 3227 template <> \
(...skipping 341 matching lines...) Expand 10 before | Expand all | Expand 10 after
3543 &InstImpl<TraitsType>::Assembler::psra, \ 3569 &InstImpl<TraitsType>::Assembler::psra, \
3544 &InstImpl<TraitsType>::Assembler::psra, \ 3570 &InstImpl<TraitsType>::Assembler::psra, \
3545 &InstImpl<TraitsType>::Assembler::psra}; \ 3571 &InstImpl<TraitsType>::Assembler::psra}; \
3546 template <> \ 3572 template <> \
3547 template <> \ 3573 template <> \
3548 const InstImpl<TraitsType>::Assembler::XmmEmitterShiftOp \ 3574 const InstImpl<TraitsType>::Assembler::XmmEmitterShiftOp \
3549 InstImpl<TraitsType>::InstX86Psrl::Base::Emitter = { \ 3575 InstImpl<TraitsType>::InstX86Psrl::Base::Emitter = { \
3550 &InstImpl<TraitsType>::Assembler::psrl, \ 3576 &InstImpl<TraitsType>::Assembler::psrl, \
3551 &InstImpl<TraitsType>::Assembler::psrl, \ 3577 &InstImpl<TraitsType>::Assembler::psrl, \
3552 &InstImpl<TraitsType>::Assembler::psrl}; \ 3578 &InstImpl<TraitsType>::Assembler::psrl}; \
3579 template <> \
3580 template <> \
3581 const InstImpl<TraitsType>::Assembler::XmmEmitterRegOp \
3582 InstImpl<TraitsType>::InstX86Punpckl::Base::Emitter = { \
3583 &InstImpl<TraitsType>::Assembler::punpckldq, \
3584 &InstImpl<TraitsType>::Assembler::punpckldq}; \
3553 } \ 3585 } \
3554 } 3586 }
3555 3587
3556 } // end of namespace X86NAMESPACE 3588 } // end of namespace X86NAMESPACE
3557 } // end of namespace Ice 3589 } // end of namespace Ice
3558 3590
3559 #include "IceInstX86BaseImpl.h" 3591 #include "IceInstX86BaseImpl.h"
3560 3592
3561 #endif // SUBZERO_SRC_ICEINSTX86BASE_H 3593 #endif // SUBZERO_SRC_ICEINSTX86BASE_H
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