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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 4831 | 4831 |
| 4832 *stack_depth = 0; | 4832 *stack_depth = 0; |
| 4833 *context_length = 0; | 4833 *context_length = 0; |
| 4834 return previous_; | 4834 return previous_; |
| 4835 } | 4835 } |
| 4836 | 4836 |
| 4837 | 4837 |
| 4838 #undef __ | 4838 #undef __ |
| 4839 | 4839 |
| 4840 | 4840 |
| 4841 static const int32_t kBranchBeforeInterrupt = 0x5a000004; | 4841 static Address GetInterruptImmediateLoadAddress(Address pc) { |
| 4842 Address load_address = pc - 2 * Assembler::kInstrSize; |
| 4843 if (!FLAG_enable_ool_constant_pool) { |
| 4844 ASSERT(Assembler::IsLdrPcImmediateOffset(Memory::int32_at(load_address))); |
| 4845 } else if (Assembler::IsMovT(Memory::int32_at(load_address))) { |
| 4846 load_address -= Assembler::kInstrSize; |
| 4847 ASSERT(Assembler::IsMovW(Memory::int32_at(load_address))); |
| 4848 } else { |
| 4849 // TODO(rmcilroy): uncomment when IsLdrPpImmediateOffset lands. |
| 4850 // ASSERT(IsLdrPpImmediateOffset(Memory::int32_at(load_address))); |
| 4851 } |
| 4852 return load_address; |
| 4853 } |
| 4842 | 4854 |
| 4843 | 4855 |
| 4844 void BackEdgeTable::PatchAt(Code* unoptimized_code, | 4856 void BackEdgeTable::PatchAt(Code* unoptimized_code, |
| 4845 Address pc, | 4857 Address pc, |
| 4846 BackEdgeState target_state, | 4858 BackEdgeState target_state, |
| 4847 Code* replacement_code) { | 4859 Code* replacement_code) { |
| 4848 static const int kInstrSize = Assembler::kInstrSize; | 4860 static const int kInstrSize = Assembler::kInstrSize; |
| 4849 Address branch_address = pc - 3 * kInstrSize; | 4861 Address pc_immediate_load_address = GetInterruptImmediateLoadAddress(pc); |
| 4862 Address branch_address = pc_immediate_load_address - kInstrSize; |
| 4850 CodePatcher patcher(branch_address, 1); | 4863 CodePatcher patcher(branch_address, 1); |
| 4851 | |
| 4852 switch (target_state) { | 4864 switch (target_state) { |
| 4853 case INTERRUPT: | 4865 case INTERRUPT: |
| 4866 { |
| 4854 // <decrement profiling counter> | 4867 // <decrement profiling counter> |
| 4855 // 2a 00 00 01 bpl ok | 4868 // bpl ok |
| 4856 // e5 9f c? ?? ldr ip, [pc, <interrupt stub address>] | 4869 // ; load interrupt stub address into ip - either of: |
| 4857 // e1 2f ff 3c blx ip | 4870 // ldr ip, [pc/pp, <constant pool offset>] | movw ip, <immed low> |
| 4871 // | movt ip, <immed high> |
| 4872 // blx ip |
| 4858 // ok-label | 4873 // ok-label |
| 4859 patcher.masm()->b(4 * kInstrSize, pl); // Jump offset is 4 instructions. | 4874 |
| 4860 ASSERT_EQ(kBranchBeforeInterrupt, Memory::int32_at(branch_address)); | 4875 // Calculate branch offet to the ok-label - this is the difference between |
| 4876 // the branch address and |pc| (which points at <blx ip>) plus one instr. |
| 4877 int branch_offset = pc + kInstrSize - branch_address; |
| 4878 patcher.masm()->b(branch_offset, pl); |
| 4861 break; | 4879 break; |
| 4880 } |
| 4862 case ON_STACK_REPLACEMENT: | 4881 case ON_STACK_REPLACEMENT: |
| 4863 case OSR_AFTER_STACK_CHECK: | 4882 case OSR_AFTER_STACK_CHECK: |
| 4864 // <decrement profiling counter> | 4883 // <decrement profiling counter> |
| 4865 // e1 a0 00 00 mov r0, r0 (NOP) | 4884 // mov r0, r0 (NOP) |
| 4866 // e5 9f c? ?? ldr ip, [pc, <on-stack replacement address>] | 4885 // ; load on-stack replacement address into ip - either of: |
| 4867 // e1 2f ff 3c blx ip | 4886 // ldr ip, [pc/pp, <constant pool offset>] | movw ip, <immed low> |
| 4887 // | movt ip, <immed high> |
| 4888 // blx ip |
| 4868 // ok-label | 4889 // ok-label |
| 4869 patcher.masm()->nop(); | 4890 patcher.masm()->nop(); |
| 4870 break; | 4891 break; |
| 4871 } | 4892 } |
| 4872 | 4893 |
| 4873 Address pc_immediate_load_address = pc - 2 * kInstrSize; | |
| 4874 // Replace the call address. | 4894 // Replace the call address. |
| 4875 uint32_t interrupt_address_offset = | 4895 Assembler::set_target_address_at(pc_immediate_load_address, unoptimized_code, |
| 4876 Memory::uint16_at(pc_immediate_load_address) & 0xfff; | 4896 replacement_code->entry()); |
| 4877 Address interrupt_address_pointer = pc + interrupt_address_offset; | |
| 4878 Memory::uint32_at(interrupt_address_pointer) = | |
| 4879 reinterpret_cast<uint32_t>(replacement_code->entry()); | |
| 4880 | 4897 |
| 4881 unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch( | 4898 unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch( |
| 4882 unoptimized_code, pc_immediate_load_address, replacement_code); | 4899 unoptimized_code, pc_immediate_load_address, replacement_code); |
| 4883 } | 4900 } |
| 4884 | 4901 |
| 4885 | 4902 |
| 4886 BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState( | 4903 BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState( |
| 4887 Isolate* isolate, | 4904 Isolate* isolate, |
| 4888 Code* unoptimized_code, | 4905 Code* unoptimized_code, |
| 4889 Address pc) { | 4906 Address pc) { |
| 4890 static const int kInstrSize = Assembler::kInstrSize; | 4907 static const int kInstrSize = Assembler::kInstrSize; |
| 4891 ASSERT(Memory::int32_at(pc - kInstrSize) == kBlxIp); | 4908 ASSERT(Memory::int32_at(pc - kInstrSize) == kBlxIp); |
| 4892 | 4909 |
| 4893 Address branch_address = pc - 3 * kInstrSize; | 4910 Address pc_immediate_load_address = GetInterruptImmediateLoadAddress(pc); |
| 4894 Address pc_immediate_load_address = pc - 2 * kInstrSize; | 4911 Address branch_address = pc_immediate_load_address - kInstrSize; |
| 4895 uint32_t interrupt_address_offset = | 4912 Address interrupt_address = Assembler::target_address_at( |
| 4896 Memory::uint16_at(pc_immediate_load_address) & 0xfff; | 4913 pc_immediate_load_address, unoptimized_code); |
| 4897 Address interrupt_address_pointer = pc + interrupt_address_offset; | |
| 4898 | 4914 |
| 4899 if (Memory::int32_at(branch_address) == kBranchBeforeInterrupt) { | 4915 if (Assembler::IsBranch(Assembler::instr_at(branch_address))) { |
| 4900 ASSERT(Memory::uint32_at(interrupt_address_pointer) == | 4916 ASSERT(interrupt_address == |
| 4901 reinterpret_cast<uint32_t>( | 4917 isolate->builtins()->InterruptCheck()->entry()); |
| 4902 isolate->builtins()->InterruptCheck()->entry())); | |
| 4903 ASSERT(Assembler::IsLdrPcImmediateOffset( | |
| 4904 Assembler::instr_at(pc_immediate_load_address))); | |
| 4905 return INTERRUPT; | 4918 return INTERRUPT; |
| 4906 } | 4919 } |
| 4907 | 4920 |
| 4908 ASSERT(Assembler::IsNop(Assembler::instr_at(branch_address))); | 4921 ASSERT(Assembler::IsNop(Assembler::instr_at(branch_address))); |
| 4909 ASSERT(Assembler::IsLdrPcImmediateOffset( | |
| 4910 Assembler::instr_at(pc_immediate_load_address))); | |
| 4911 | 4922 |
| 4912 if (Memory::uint32_at(interrupt_address_pointer) == | 4923 if (interrupt_address == |
| 4913 reinterpret_cast<uint32_t>( | 4924 isolate->builtins()->OnStackReplacement()->entry()) { |
| 4914 isolate->builtins()->OnStackReplacement()->entry())) { | |
| 4915 return ON_STACK_REPLACEMENT; | 4925 return ON_STACK_REPLACEMENT; |
| 4916 } | 4926 } |
| 4917 | 4927 |
| 4918 ASSERT(Memory::uint32_at(interrupt_address_pointer) == | 4928 ASSERT(interrupt_address == |
| 4919 reinterpret_cast<uint32_t>( | 4929 isolate->builtins()->OsrAfterStackCheck()->entry()); |
| 4920 isolate->builtins()->OsrAfterStackCheck()->entry())); | |
| 4921 return OSR_AFTER_STACK_CHECK; | 4930 return OSR_AFTER_STACK_CHECK; |
| 4922 } | 4931 } |
| 4923 | 4932 |
| 4924 | 4933 |
| 4925 } } // namespace v8::internal | 4934 } } // namespace v8::internal |
| 4926 | 4935 |
| 4927 #endif // V8_TARGET_ARCH_ARM | 4936 #endif // V8_TARGET_ARCH_ARM |
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