Add support for movw/movt immediate loads to BackEdgeTable on ARM to enable ool constant pool.

src/arm/full-codegen-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
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 // modification, are permitted provided that the following conditions are
 // met:
 //
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@@ skipping 4820 matching lines @@
 
   *stack_depth = 0;
   *context_length = 0;
   return previous_;
 }
 
 
 #undef __
 
 
-static const int32_t kBranchBeforeInterrupt =  0x5a000004;
+static Address GetInterruptImmediateLoadAddress(Address pc) {
+  Address immediate_load_address = pc - 2 * Assembler::kInstrSize;
+  if (FLAG_enable_ool_constant_pool &&
+      Assembler::IsMovT(Memory::int32_at(immediate_load_address))) {

[Rodolph Perfetta (ARM), 2014/03/10 16:19:59]

Is there a case where ool is enable and we don't have a movt here?

[rmcilroy, 2014/03/11 19:05:53]

Yes, the possibilities are:
 existing inline constant pool:
         ldr[pc...]
 new ool constant pool:
   - if the assembler could use the constant pool (e.g., was available and not
full):
         ldr[pp...]
   - if not able to use the constant pool:
         movt[...]
         movw[...]

I've reworked the function to be more understandable.

+    immediate_load_address -= Assembler::kInstrSize;
+  }
+  return immediate_load_address;
+}
 
 
 void BackEdgeTable::PatchAt(Code* unoptimized_code,
                             Address pc,
                             BackEdgeState target_state,
                             Code* replacement_code) {
   static const int kInstrSize = Assembler::kInstrSize;
-  Address branch_address = pc - 3 * kInstrSize;
+  Address pc_immediate_load_address = GetInterruptImmediateLoadAddress(pc);
+  Address branch_address = pc_immediate_load_address - kInstrSize;
+  int branch_offset = (2 * kInstrSize) + (pc - pc_immediate_load_address);

[Rodolph Perfetta (ARM), 2014/03/10 16:19:59]

Some comments about the 2 * kInstrSize would be nice

[rmcilroy, 2014/03/11 19:05:53]

Done (and reworked the calculation to be more understandable).

   CodePatcher patcher(branch_address, 1);
-
   switch (target_state) {
     case INTERRUPT:
-      //  <decrement profiling counter>
-      //  2a 00 00 01       bpl ok
-      //  e5 9f c? ??       ldr ip, [pc, <interrupt stub address>]
-      //  e1 2f ff 3c       blx ip
-      //  ok-label
-      patcher.masm()->b(4 * kInstrSize, pl);  // Jump offset is 4 instructions.
-      ASSERT_EQ(kBranchBeforeInterrupt, Memory::int32_at(branch_address));
+      patcher.masm()->b(branch_offset, pl);

[Rodolph Perfetta (ARM), 2014/03/10 16:19:59]

While I agree the encoding isn't that interesting, having the patched code
sequence as comments make the code easier to read. Admittedly this is a bit more
complicated now.

[rmcilroy, 2014/03/11 19:05:53]

Done.

+      ASSERT(Assembler::IsBranch(Assembler::instr_at(branch_address)));

[Rodolph Perfetta (ARM), 2014/03/10 16:19:59]

This assert check that b(...) will emit a branch, is that useful?

[rmcilroy, 2014/03/11 19:05:53]

Agreed, not useful.  Removed.

       break;
     case ON_STACK_REPLACEMENT:
     case OSR_AFTER_STACK_CHECK:
-      //  <decrement profiling counter>
-      //  e1 a0 00 00       mov r0, r0 (NOP)
-      //  e5 9f c? ??       ldr ip, [pc, <on-stack replacement address>]
-      //  e1 2f ff 3c       blx ip
-      //  ok-label
       patcher.masm()->nop();
       break;
   }
 
-  Address pc_immediate_load_address = pc - 2 * kInstrSize;
-  // Replace the call address.
-  uint32_t interrupt_address_offset =
-      Memory::uint16_at(pc_immediate_load_address) & 0xfff;
-  Address interrupt_address_pointer = pc + interrupt_address_offset;
-  Memory::uint32_at(interrupt_address_pointer) =
-      reinterpret_cast<uint32_t>(replacement_code->entry());
+  Assembler::set_target_address_at(pc_immediate_load_address, unoptimized_code,
+      replacement_code->entry());
 
   unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch(
       unoptimized_code, pc_immediate_load_address, replacement_code);
 }
 
 
 BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState(
     Isolate* isolate,
     Code* unoptimized_code,
     Address pc) {
   static const int kInstrSize = Assembler::kInstrSize;
   ASSERT(Memory::int32_at(pc - kInstrSize) == kBlxIp);
 
-  Address branch_address = pc - 3 * kInstrSize;
-  Address pc_immediate_load_address = pc - 2 * kInstrSize;
-  uint32_t interrupt_address_offset =
-      Memory::uint16_at(pc_immediate_load_address) & 0xfff;
-  Address interrupt_address_pointer = pc + interrupt_address_offset;
+  Address pc_immediate_load_address = GetInterruptImmediateLoadAddress(pc);
+  Address branch_address = pc_immediate_load_address - kInstrSize;
+  Address interrupt_address = Assembler::target_address_at(
+      pc_immediate_load_address, unoptimized_code);
 
-  if (Memory::int32_at(branch_address) == kBranchBeforeInterrupt) {
-    ASSERT(Memory::uint32_at(interrupt_address_pointer) ==
-           reinterpret_cast<uint32_t>(
-               isolate->builtins()->InterruptCheck()->entry()));
-    ASSERT(Assembler::IsLdrPcImmediateOffset(
-               Assembler::instr_at(pc_immediate_load_address)));
+  if (Assembler::IsBranch(Assembler::instr_at(branch_address))) {
+    ASSERT(interrupt_address ==
+           isolate->builtins()->InterruptCheck()->entry());
     return INTERRUPT;
   }
 
   ASSERT(Assembler::IsNop(Assembler::instr_at(branch_address)));
-  ASSERT(Assembler::IsLdrPcImmediateOffset(
-             Assembler::instr_at(pc_immediate_load_address)));
 
-  if (Memory::uint32_at(interrupt_address_pointer) ==
-      reinterpret_cast<uint32_t>(
-          isolate->builtins()->OnStackReplacement()->entry())) {
+  if (interrupt_address ==
+      isolate->builtins()->OnStackReplacement()->entry()) {
     return ON_STACK_REPLACEMENT;
   }
 
-  ASSERT(Memory::uint32_at(interrupt_address_pointer) ==
-         reinterpret_cast<uint32_t>(
-             isolate->builtins()->OsrAfterStackCheck()->entry()));
+  ASSERT(interrupt_address ==
+         isolate->builtins()->OsrAfterStackCheck()->entry());
   return OSR_AFTER_STACK_CHECK;
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM