Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(46)

Side by Side Diff: src/a64/codegen-a64.cc

Issue 190663009: A64: Add and use a double register which holds the 0.0 value. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/a64/code-stubs-a64.cc ('k') | src/a64/deoptimizer-a64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 528 matching lines...) Expand 10 before | Expand all | Expand 10 after
539 // NZCV 539 // NZCV
540 // 1000 -708.4 < input < 709.8 result = exp(input) 540 // 1000 -708.4 < input < 709.8 result = exp(input)
541 // 0110 input == 709.8 result = +infinity 541 // 0110 input == 709.8 result = +infinity
542 // 0010 input > 709.8 result = +infinity 542 // 0010 input > 709.8 result = +infinity
543 // 0011 input is NaN result = input 543 // 0011 input is NaN result = input
544 // 0000 input <= -708.4 result = +0.0 544 // 0000 input <= -708.4 result = +0.0
545 545
546 // Continue the common case first. 'mi' tests N == 1. 546 // Continue the common case first. 'mi' tests N == 1.
547 __ B(&result_is_finite_non_zero, mi); 547 __ B(&result_is_finite_non_zero, mi);
548 548
549 // TODO(jbramley): Add (and use) a zero D register for A64.
550 // TODO(jbramley): Consider adding a +infinity register for A64. 549 // TODO(jbramley): Consider adding a +infinity register for A64.
551 __ Ldr(double_temp2, ExpConstant(constants, 2)); // Synthesize +infinity. 550 __ Ldr(double_temp2, ExpConstant(constants, 2)); // Synthesize +infinity.
552 __ Fsub(double_temp1, double_temp1, double_temp1); // Synthesize +0.0.
553 551
554 // Select between +0.0 and +infinity. 'lo' tests C == 0. 552 // Select between +0.0 and +infinity. 'lo' tests C == 0.
555 __ Fcsel(result, double_temp1, double_temp2, lo); 553 __ Fcsel(result, fp_zero, double_temp2, lo);
556 // Select between {+0.0 or +infinity} and input. 'vc' tests V == 0. 554 // Select between {+0.0 or +infinity} and input. 'vc' tests V == 0.
557 __ Fcsel(result, result, input, vc); 555 __ Fcsel(result, result, input, vc);
558 __ B(&done); 556 __ B(&done);
559 557
560 // The rest is magic, as described in InitializeMathExpData(). 558 // The rest is magic, as described in InitializeMathExpData().
561 __ Bind(&result_is_finite_non_zero); 559 __ Bind(&result_is_finite_non_zero);
562 560
563 // Assert that we can load offset 3 and offset 4 with a single ldp. 561 // Assert that we can load offset 3 and offset 4 with a single ldp.
564 ASSERT(kDRegSizeInBytes == (ExpConstant(constants, 4).offset() - 562 ASSERT(kDRegSizeInBytes == (ExpConstant(constants, 4).offset() -
565 ExpConstant(constants, 3).offset())); 563 ExpConstant(constants, 3).offset()));
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
608 __ Fmul(result, double_temp3, double_temp1); 606 __ Fmul(result, double_temp3, double_temp1);
609 607
610 __ Bind(&done); 608 __ Bind(&done);
611 } 609 }
612 610
613 #undef __ 611 #undef __
614 612
615 } } // namespace v8::internal 613 } } // namespace v8::internal
616 614
617 #endif // V8_TARGET_ARCH_A64 615 #endif // V8_TARGET_ARCH_A64
OLDNEW
« no previous file with comments | « src/a64/code-stubs-a64.cc ('k') | src/a64/deoptimizer-a64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698