A64: Add and use a double register which holds the 0.0 value.

src/a64/code-stubs-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1164 matching lines @@
   // Handle double (heap number) exponents.
   if (exponent_type_ != INTEGER) {
     // Detect integer exponents stored as doubles and handle those in the
     // integer fast-path.
     __ TryConvertDoubleToInt64(exponent_integer, exponent_double,
                                scratch0_double, &exponent_is_integer);
 
     if (exponent_type_ == ON_STACK) {
       FPRegister  half_double = d3;
       FPRegister  minus_half_double = d4;
-      FPRegister  zero_double = d5;
       // Detect square root case. Crankshaft detects constant +/-0.5 at compile
       // time and uses DoMathPowHalf instead. We then skip this check for
       // non-constant cases of +/-0.5 as these hardly occur.
 
       __ Fmov(minus_half_double, -0.5);
       __ Fmov(half_double, 0.5);
       __ Fcmp(minus_half_double, exponent_double);
       __ Fccmp(half_double, exponent_double, NZFlag, ne);
       // Condition flags at this point:
       //    0.5;  nZCv    // Identified by eq && pl
@@ skipping 12 matching lines @@
       //    exponent == -0.5:             The result is +0.
       //  (base == +0) || (base == -0)
       //    exponent == 0.5:              The result is +0.
       //    exponent == -0.5:             The result is +INFINITY.
       //  (base < 0) && base.isFinite():  The result is NaN.
       //
       // Fsqrt (and Fdiv for the -0.5 case) can handle all of those except
       // where base is -INFINITY or -0.
 
       // Add +0 to base. This has no effect other than turning -0 into +0.
-      __ Fmov(zero_double, 0.0);
-      __ Fadd(base_double, base_double, zero_double);
+      __ Fadd(base_double, base_double, fp_zero);
       // The operation -0+0 results in +0 in all cases except where the
       // FPCR rounding mode is 'round towards minus infinity' (RM). The
       // A64 simulator does not currently simulate FPCR (where the rounding
       // mode is set), so test the operation with some debug code.
       if (masm->emit_debug_code()) {
         Register temp = masm->Tmp1();
-        //  d5  zero_double   The value +0.0 as a double.
-        __ Fneg(scratch0_double, zero_double);
+        __ Fneg(scratch0_double, fp_zero);
         // Verify that we correctly generated +0.0 and -0.0.
         //  bits(+0.0) = 0x0000000000000000
         //  bits(-0.0) = 0x8000000000000000
-        __ Fmov(temp, zero_double);
+        __ Fmov(temp, fp_zero);
         __ CheckRegisterIsClear(temp, kCouldNotGenerateZero);
         __ Fmov(temp, scratch0_double);
         __ Eor(temp, temp, kDSignMask);
         __ CheckRegisterIsClear(temp, kCouldNotGenerateNegativeZero);
         // Check that -0.0 + 0.0 == +0.0.
-        __ Fadd(scratch0_double, scratch0_double, zero_double);
+        __ Fadd(scratch0_double, scratch0_double, fp_zero);
         __ Fmov(temp, scratch0_double);
         __ CheckRegisterIsClear(temp, kExpectedPositiveZero);
       }
 
       // If base is -INFINITY, make it +INFINITY.
       //  * Calculate base - base: All infinities will become NaNs since both
       //    -INFINITY+INFINITY and +INFINITY-INFINITY are NaN in A64.
       //  * If the result is NaN, calculate abs(base).
       __ Fsub(scratch0_double, base_double, base_double);
       __ Fcmp(scratch0_double, 0.0);
@@ skipping 536 matching lines @@
   //
   // We must not write to jssp until after the PushCalleeSavedRegisters()
   // call, since jssp is itself a callee-saved register.
   __ SetStackPointer(csp);
   __ PushCalleeSavedRegisters();
   __ Mov(jssp, csp);
   __ SetStackPointer(jssp);
 
   ProfileEntryHookStub::MaybeCallEntryHook(masm);
 
+  // Set up the reserved register for 0.0.
+  __ Fmov(fp_zero, 0.0);
+
   // Build an entry frame (see layout below).
   Isolate* isolate = masm->isolate();
 
   // Build an entry frame.
   int marker = is_construct ? StackFrame::ENTRY_CONSTRUCT : StackFrame::ENTRY;
   int64_t bad_frame_pointer = -1L;  // Bad frame pointer to fail if it is used.
   __ Mov(x13, bad_frame_pointer);
   __ Mov(x12, Operand(Smi::FromInt(marker)));
   __ Mov(x11, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate)));
   __ Ldr(x10, MemOperand(x11));
@@ skipping 3998 matching lines @@
                               MemOperand(fp, 6 * kPointerSize),
                               NULL);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64