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Issue 1905613002: S390: Fixed LBR, LGBR, LHR, LGHR instructions in simulator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Removed existing LGBR, LHR, LGHR evals that redirected to original linear opcode search Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <stdarg.h> 5 #include <stdarg.h>
6 #include <stdlib.h> 6 #include <stdlib.h>
7 #include <cmath> 7 #include <cmath>
8 8
9 #if V8_TARGET_ARCH_S390 9 #if V8_TARGET_ARCH_S390
10 10
(...skipping 3706 matching lines...) Expand 10 before | Expand all | Expand 10 after
3717 int32_t mem_val = ReadW(b2_val + x2_val + d2_val, instr); 3717 int32_t mem_val = ReadW(b2_val + x2_val + d2_val, instr);
3718 int32_t r1_val = get_low_register<int32_t>(r1); 3718 int32_t r1_val = get_low_register<int32_t>(r1);
3719 set_low_register(r1, r1_val * mem_val); 3719 set_low_register(r1, r1_val * mem_val);
3720 break; 3720 break;
3721 } 3721 }
3722 case LGBR: 3722 case LGBR:
3723 case LBR: { 3723 case LBR: {
3724 RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr); 3724 RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr);
3725 int r1 = rrinst->R1Value(); 3725 int r1 = rrinst->R1Value();
3726 int r2 = rrinst->R2Value(); 3726 int r2 = rrinst->R2Value();
3727 #ifdef V8_TARGET_ARCH_S390X 3727 if (op == LGBR) {
3728 int64_t r2_val = get_low_register<int64_t>(r2); 3728 int64_t r2_val = get_low_register<int64_t>(r2);
3729 r2_val <<= 56; 3729 r2_val <<= 56;
3730 r2_val >>= 56; 3730 r2_val >>= 56;
3731 set_register(r1, r2_val); 3731 set_register(r1, r2_val);
3732 #else 3732 } else if (op == LBR) {
3733 int32_t r2_val = get_low_register<int32_t>(r2); 3733 int32_t r2_val = get_low_register<int32_t>(r2);
3734 r2_val <<= 24; 3734 r2_val <<= 24;
3735 r2_val >>= 24; 3735 r2_val >>= 24;
3736 set_low_register(r1, r2_val); 3736 set_low_register(r1, r2_val);
3737 #endif 3737 } else {
3738 UNREACHABLE();
3739 }
3738 break; 3740 break;
3739 } 3741 }
3740 case LGHR: 3742 case LGHR:
3741 case LHR: { 3743 case LHR: {
3742 RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr); 3744 RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr);
3743 int r1 = rrinst->R1Value(); 3745 int r1 = rrinst->R1Value();
3744 int r2 = rrinst->R2Value(); 3746 int r2 = rrinst->R2Value();
3745 #ifdef V8_TARGET_ARCH_S390X 3747 if (op == LGHR) {
3746 int64_t r2_val = get_low_register<int64_t>(r2); 3748 int64_t r2_val = get_low_register<int64_t>(r2);
3747 r2_val <<= 48; 3749 r2_val <<= 48;
3748 r2_val >>= 48; 3750 r2_val >>= 48;
3749 set_register(r1, r2_val); 3751 set_register(r1, r2_val);
3750 #else 3752 } else if (op == LHR) {
3751 int32_t r2_val = get_low_register<int32_t>(r2); 3753 int32_t r2_val = get_low_register<int32_t>(r2);
3752 r2_val <<= 16; 3754 r2_val <<= 16;
3753 r2_val >>= 16; 3755 r2_val >>= 16;
3754 set_low_register(r1, r2_val); 3756 set_low_register(r1, r2_val);
3755 #endif 3757 } else {
3758 UNREACHABLE();
3759 }
3756 break; 3760 break;
3757 } 3761 }
3758 case ALCR: { 3762 case ALCR: {
3759 RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr); 3763 RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr);
3760 int r1 = rrinst->R1Value(); 3764 int r1 = rrinst->R1Value();
3761 int r2 = rrinst->R2Value(); 3765 int r2 = rrinst->R2Value();
3762 uint32_t r1_val = get_low_register<uint32_t>(r1); 3766 uint32_t r1_val = get_low_register<uint32_t>(r1);
3763 uint32_t r2_val = get_low_register<uint32_t>(r2); 3767 uint32_t r2_val = get_low_register<uint32_t>(r2);
3764 uint32_t alu_out = 0; 3768 uint32_t alu_out = 0;
3765 bool isOF = false; 3769 bool isOF = false;
(...skipping 2322 matching lines...) Expand 10 before | Expand all | Expand 10 after
6088 EVALUATE(LBR) { 6092 EVALUATE(LBR) {
6089 DCHECK_OPCODE(LBR); 6093 DCHECK_OPCODE(LBR);
6090 DECODE_RRE_INSTRUCTION(r1, r2); 6094 DECODE_RRE_INSTRUCTION(r1, r2);
6091 int32_t r2_val = get_low_register<int32_t>(r2); 6095 int32_t r2_val = get_low_register<int32_t>(r2);
6092 r2_val <<= 24; 6096 r2_val <<= 24;
6093 r2_val >>= 24; 6097 r2_val >>= 24;
6094 set_low_register(r1, r2_val); 6098 set_low_register(r1, r2_val);
6095 return length; 6099 return length;
6096 } 6100 }
6097 6101
6102 EVALUATE(LGBR) {
6103 DCHECK_OPCODE(LGBR);
6104 DECODE_RRE_INSTRUCTION(r1, r2);
6105 int64_t r2_val = get_low_register<int64_t>(r2);
6106 r2_val <<= 56;
6107 r2_val >>= 56;
6108 set_register(r1, r2_val);
6109 return length;
6110 }
6111
6112 EVALUATE(LHR) {
6113 DCHECK_OPCODE(LHR);
6114 DECODE_RRE_INSTRUCTION(r1, r2);
6115 int32_t r2_val = get_low_register<int32_t>(r2);
6116 r2_val <<= 16;
6117 r2_val >>= 16;
6118 set_low_register(r1, r2_val);
6119 return length;
6120 }
6121
6122 EVALUATE(LGHR) {
6123 DCHECK_OPCODE(LGHR);
6124 DECODE_RRE_INSTRUCTION(r1, r2);
6125 int64_t r2_val = get_low_register<int64_t>(r2);
6126 r2_val <<= 48;
6127 r2_val >>= 48;
6128 set_register(r1, r2_val);
6129 return length;
6130 }
6131
6098 EVALUATE(LGF) { 6132 EVALUATE(LGF) {
6099 DCHECK_OPCODE(LGF); 6133 DCHECK_OPCODE(LGF);
6100 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2); 6134 DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2);
6101 intptr_t addr = GET_ADDRESS(x2, b2, d2); 6135 intptr_t addr = GET_ADDRESS(x2, b2, d2);
6102 int64_t mem_val = static_cast<int64_t>(ReadW(addr, instr)); 6136 int64_t mem_val = static_cast<int64_t>(ReadW(addr, instr));
6103 set_register(r1, mem_val); 6137 set_register(r1, mem_val);
6104 return length; 6138 return length;
6105 } 6139 }
6106 6140
6107 EVALUATE(ST) { 6141 EVALUATE(ST) {
(...skipping 892 matching lines...) Expand 10 before | Expand all | Expand 10 after
7000 EVALUATE(RRXTR) { return DecodeInstructionOriginal(instr); } 7034 EVALUATE(RRXTR) { return DecodeInstructionOriginal(instr); }
7001 7035
7002 EVALUATE(LPGR) { return DecodeInstructionOriginal(instr); } 7036 EVALUATE(LPGR) { return DecodeInstructionOriginal(instr); }
7003 7037
7004 EVALUATE(LNGR) { return DecodeInstructionOriginal(instr); } 7038 EVALUATE(LNGR) { return DecodeInstructionOriginal(instr); }
7005 7039
7006 EVALUATE(LTGR) { return DecodeInstructionOriginal(instr); } 7040 EVALUATE(LTGR) { return DecodeInstructionOriginal(instr); }
7007 7041
7008 EVALUATE(LCGR) { return DecodeInstructionOriginal(instr); } 7042 EVALUATE(LCGR) { return DecodeInstructionOriginal(instr); }
7009 7043
7010 EVALUATE(LGBR) { return DecodeInstructionOriginal(instr); }
7011
7012 EVALUATE(LGHR) { return DecodeInstructionOriginal(instr); }
7013
7014 EVALUATE(SGR) { return DecodeInstructionOriginal(instr); } 7044 EVALUATE(SGR) { return DecodeInstructionOriginal(instr); }
7015 7045
7016 EVALUATE(ALGR) { return DecodeInstructionOriginal(instr); } 7046 EVALUATE(ALGR) { return DecodeInstructionOriginal(instr); }
7017 7047
7018 EVALUATE(SLGR) { return DecodeInstructionOriginal(instr); } 7048 EVALUATE(SLGR) { return DecodeInstructionOriginal(instr); }
7019 7049
7020 EVALUATE(MSGR) { return DecodeInstructionOriginal(instr); } 7050 EVALUATE(MSGR) { return DecodeInstructionOriginal(instr); }
7021 7051
7022 EVALUATE(DSGR) { return DecodeInstructionOriginal(instr); } 7052 EVALUATE(DSGR) { return DecodeInstructionOriginal(instr); }
7023 7053
(...skipping 24 matching lines...) Expand all
7048 EVALUATE(DSGFR) { return DecodeInstructionOriginal(instr); } 7078 EVALUATE(DSGFR) { return DecodeInstructionOriginal(instr); }
7049 7079
7050 EVALUATE(KMAC) { return DecodeInstructionOriginal(instr); } 7080 EVALUATE(KMAC) { return DecodeInstructionOriginal(instr); }
7051 7081
7052 EVALUATE(LRVR) { return DecodeInstructionOriginal(instr); } 7082 EVALUATE(LRVR) { return DecodeInstructionOriginal(instr); }
7053 7083
7054 EVALUATE(CGR) { return DecodeInstructionOriginal(instr); } 7084 EVALUATE(CGR) { return DecodeInstructionOriginal(instr); }
7055 7085
7056 EVALUATE(CLGR) { return DecodeInstructionOriginal(instr); } 7086 EVALUATE(CLGR) { return DecodeInstructionOriginal(instr); }
7057 7087
7058 EVALUATE(LHR) { return DecodeInstructionOriginal(instr); }
7059
7060 EVALUATE(KMF) { return DecodeInstructionOriginal(instr); } 7088 EVALUATE(KMF) { return DecodeInstructionOriginal(instr); }
7061 7089
7062 EVALUATE(KMO) { return DecodeInstructionOriginal(instr); } 7090 EVALUATE(KMO) { return DecodeInstructionOriginal(instr); }
7063 7091
7064 EVALUATE(PCC) { return DecodeInstructionOriginal(instr); } 7092 EVALUATE(PCC) { return DecodeInstructionOriginal(instr); }
7065 7093
7066 EVALUATE(KMCTR) { return DecodeInstructionOriginal(instr); } 7094 EVALUATE(KMCTR) { return DecodeInstructionOriginal(instr); }
7067 7095
7068 EVALUATE(KM) { return DecodeInstructionOriginal(instr); } 7096 EVALUATE(KM) { return DecodeInstructionOriginal(instr); }
7069 7097
(...skipping 567 matching lines...) Expand 10 before | Expand all | Expand 10 after
7637 7665
7638 EVALUATE(CXZT) { return DecodeInstructionOriginal(instr); } 7666 EVALUATE(CXZT) { return DecodeInstructionOriginal(instr); }
7639 7667
7640 #undef EVALUATE 7668 #undef EVALUATE
7641 7669
7642 } // namespace internal 7670 } // namespace internal
7643 } // namespace v8 7671 } // namespace v8
7644 7672
7645 #endif // USE_SIMULATOR 7673 #endif // USE_SIMULATOR
7646 #endif // V8_TARGET_ARCH_S390 7674 #endif // V8_TARGET_ARCH_S390
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