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Unified Diff: src/a64/macro-assembler-a64.cc

Issue 190383002: Handle non-power-of-2 divisors in division-like operations (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Rebased Created 6 years, 9 months ago
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Index: src/a64/macro-assembler-a64.cc
diff --git a/src/a64/macro-assembler-a64.cc b/src/a64/macro-assembler-a64.cc
index 53c7777ae137b62b162ee3a80050f81891f28f9a..4b1d381c29be5e14a140a9feac8e1826bba0d5df 100644
--- a/src/a64/macro-assembler-a64.cc
+++ b/src/a64/macro-assembler-a64.cc
@@ -4932,6 +4932,26 @@ bool MacroAssembler::IsCodeAgeSequence(byte* sequence) {
#endif
+void MacroAssembler::FlooringDiv(Register result,
+ Register dividend,
+ int32_t divisor) {
+ Register tmp = WTmp0();
+ ASSERT(!AreAliased(dividend, result, tmp));
+ MultiplierAndShift ms(divisor);
+ Mov(tmp, Operand(ms.multiplier()));
+ Smull(result.X(), dividend, tmp);
+ Mov(result.X(), Operand(result.X(), ASR, 32));
+ if (divisor > 0 && ms.multiplier() < 0) {
+ Add(result, result, Operand(dividend));
+ }
+ if (divisor < 0 && ms.multiplier() > 0) {
+ Sub(result, result, Operand(dividend));
+ }
+ if (ms.shift() > 0) Mov(result, Operand(result, ASR, ms.shift()));
+ Add(result, result, Operand(dividend, LSR, 31));
+}
+
+
#undef __
#define __ masm->
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