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Issue 190383002: Handle non-power-of-2 divisors in division-like operations (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Rebased Created 6 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1058 emit_modrm(dst, src); 1058 emit_modrm(dst, src);
1059 emit(imm.value_); 1059 emit(imm.value_);
1060 } else { 1060 } else {
1061 emit(0x69); 1061 emit(0x69);
1062 emit_modrm(dst, src); 1062 emit_modrm(dst, src);
1063 emitl(imm.value_); 1063 emitl(imm.value_);
1064 } 1064 }
1065 } 1065 }
1066 1066
1067 1067
1068 void Assembler::imull(Register src) {
1069 EnsureSpace ensure_space(this);
1070 emit_optional_rex_32(src);
1071 emit(0xF7);
1072 emit_modrm(0x5, src);
1073 }
1074
1075
1068 void Assembler::imull(Register dst, Register src) { 1076 void Assembler::imull(Register dst, Register src) {
1069 EnsureSpace ensure_space(this); 1077 EnsureSpace ensure_space(this);
1070 emit_optional_rex_32(dst, src); 1078 emit_optional_rex_32(dst, src);
1071 emit(0x0F); 1079 emit(0x0F);
1072 emit(0xAF); 1080 emit(0xAF);
1073 emit_modrm(dst, src); 1081 emit_modrm(dst, src);
1074 } 1082 }
1075 1083
1076 1084
1077 void Assembler::imull(Register dst, const Operand& src) { 1085 void Assembler::imull(Register dst, const Operand& src) {
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3190 bool RelocInfo::IsCodedSpecially() { 3198 bool RelocInfo::IsCodedSpecially() {
3191 // The deserializer needs to know whether a pointer is specially coded. Being 3199 // The deserializer needs to know whether a pointer is specially coded. Being
3192 // specially coded on x64 means that it is a relative 32 bit address, as used 3200 // specially coded on x64 means that it is a relative 32 bit address, as used
3193 // by branch instructions. 3201 // by branch instructions.
3194 return (1 << rmode_) & kApplyMask; 3202 return (1 << rmode_) & kApplyMask;
3195 } 3203 }
3196 3204
3197 } } // namespace v8::internal 3205 } } // namespace v8::internal
3198 3206
3199 #endif // V8_TARGET_ARCH_X64 3207 #endif // V8_TARGET_ARCH_X64
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