Implements OSR for arm and mips.

runtime/vm/stub_code_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 1316 matching lines @@
     __ EnterStubFrame();
     __ PushList((1 << R5) | (1 << R6));  // Preserve.
     __ Push(ic_reg);  // Argument.
     __ Push(func_reg);  // Argument.
     __ CallRuntime(kTraceICCallRuntimeEntry);
     __ Drop(2);  // Discard argument;
     __ PopList((1 << R5) | (1 << R6));  // Restore.
     __ LeaveStubFrame();
   }
   __ ldr(R7, FieldAddress(func_reg, Function::usage_counter_offset()));
-  Label is_hot;
-  if (FlowGraphCompiler::CanOptimize()) {
-    ASSERT(FLAG_optimization_counter_threshold > 1);
-    __ CompareImmediate(R7, FLAG_optimization_counter_threshold);
-    __ b(&is_hot, GE);
-    // As long as VM has no OSR do not optimize in the middle of the function
-    // but only at exit so that we have collected all type feedback before
-    // optimizing.
-  }
   __ add(R7, R7, ShifterOperand(1));
   __ str(R7, FieldAddress(func_reg, Function::usage_counter_offset()));
-  __ Bind(&is_hot);
 }
 
 
 // Loads function into 'temp_reg'.
 void StubCode::GenerateUsageCounterIncrement(Assembler* assembler,
                                              Register temp_reg) {
   Register ic_reg = R5;
   Register func_reg = temp_reg;
   ASSERT(temp_reg == R6);
   __ ldr(func_reg, FieldAddress(ic_reg, ICData::function_offset()));
   __ ldr(R7, FieldAddress(func_reg, Function::usage_counter_offset()));
-  Label is_hot;
-  if (FlowGraphCompiler::CanOptimize()) {
-    ASSERT(FLAG_optimization_counter_threshold > 1);
-    // The usage_counter is always less than FLAG_optimization_counter_threshold
-    // except when the function gets optimized.
-    __ CompareImmediate(R7, FLAG_optimization_counter_threshold);
-    __ b(&is_hot, EQ);
-    // As long as VM has no OSR do not optimize in the middle of the function
-    // but only at exit so that we have collected all type feedback before
-    // optimizing.
-  }
   __ add(R7, R7, ShifterOperand(1));
   __ str(R7, FieldAddress(func_reg, Function::usage_counter_offset()));
-  __ Bind(&is_hot);
 }
 
 
 // Generate inline cache check for 'num_args'.
 //  LR: return address.
 //  R5: inline cache data object.
 // Control flow:
 // - If receiver is null -> jump to IC miss.
 // - If receiver is Smi -> load Smi class.
 // - If receiver is not-Smi -> load receiver's class.
@@ skipping 729 matching lines @@
   __ ldr(left, Address(SP, 4 * kWordSize));
   __ ldr(right, Address(SP, 3 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp);
   __ PopList((1 << R0) | (1 << R1) | (1 << R2));
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM