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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> | 5 #include <limits.h> |
6 #include <stdarg.h> | 6 #include <stdarg.h> |
7 #include <stdlib.h> | 7 #include <stdlib.h> |
8 #include <cmath> | 8 #include <cmath> |
9 | 9 |
10 #if V8_TARGET_ARCH_MIPS64 | 10 #if V8_TARGET_ARCH_MIPS64 |
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3812 break; | 3812 break; |
3813 case TLTU: | 3813 case TLTU: |
3814 do_interrupt = rs_u() < rt_u(); | 3814 do_interrupt = rs_u() < rt_u(); |
3815 break; | 3815 break; |
3816 case TEQ: | 3816 case TEQ: |
3817 do_interrupt = rs() == rt(); | 3817 do_interrupt = rs() == rt(); |
3818 break; | 3818 break; |
3819 case TNE: | 3819 case TNE: |
3820 do_interrupt = rs() != rt(); | 3820 do_interrupt = rs() != rt(); |
3821 break; | 3821 break; |
| 3822 case SYNC: |
| 3823 // TODO(palfia): Ignore sync instruction for now. |
| 3824 break; |
3822 // Conditional moves. | 3825 // Conditional moves. |
3823 case MOVN: | 3826 case MOVN: |
3824 if (rt()) { | 3827 if (rt()) { |
3825 SetResult(rd_reg(), rs()); | 3828 SetResult(rd_reg(), rs()); |
3826 } | 3829 } |
3827 break; | 3830 break; |
3828 case MOVCI: { | 3831 case MOVCI: { |
3829 uint32_t cc = get_instr()->FBccValue(); | 3832 uint32_t cc = get_instr()->FBccValue(); |
3830 uint32_t fcsr_cc = get_fcsr_condition_bit(cc); | 3833 uint32_t fcsr_cc = get_fcsr_condition_bit(cc); |
3831 if (get_instr()->Bit(16)) { // Read Tf bit. | 3834 if (get_instr()->Bit(16)) { // Read Tf bit. |
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4889 } | 4892 } |
4890 | 4893 |
4891 | 4894 |
4892 #undef UNSUPPORTED | 4895 #undef UNSUPPORTED |
4893 } // namespace internal | 4896 } // namespace internal |
4894 } // namespace v8 | 4897 } // namespace v8 |
4895 | 4898 |
4896 #endif // USE_SIMULATOR | 4899 #endif // USE_SIMULATOR |
4897 | 4900 |
4898 #endif // V8_TARGET_ARCH_MIPS64 | 4901 #endif // V8_TARGET_ARCH_MIPS64 |
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