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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // A Disassembler object is used to disassemble a block of code instruction by | 5 // A Disassembler object is used to disassemble a block of code instruction by |
6 // instruction. The default implementation of the NameConverter object can be | 6 // instruction. The default implementation of the NameConverter object can be |
7 // overriden to modify register names or to do symbol lookup on addresses. | 7 // overriden to modify register names or to do symbol lookup on addresses. |
8 // | 8 // |
9 // The example below will disassemble a block of code and print it to stdout. | 9 // The example below will disassemble a block of code and print it to stdout. |
10 // | 10 // |
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1380 break; | 1380 break; |
1381 case TLTU: | 1381 case TLTU: |
1382 Format(instr, "tltu 'rs, 'rt, code: 'code"); | 1382 Format(instr, "tltu 'rs, 'rt, code: 'code"); |
1383 break; | 1383 break; |
1384 case TEQ: | 1384 case TEQ: |
1385 Format(instr, "teq 'rs, 'rt, code: 'code"); | 1385 Format(instr, "teq 'rs, 'rt, code: 'code"); |
1386 break; | 1386 break; |
1387 case TNE: | 1387 case TNE: |
1388 Format(instr, "tne 'rs, 'rt, code: 'code"); | 1388 Format(instr, "tne 'rs, 'rt, code: 'code"); |
1389 break; | 1389 break; |
| 1390 case SYNC: |
| 1391 Format(instr, "sync"); |
| 1392 break; |
1390 case MOVZ: | 1393 case MOVZ: |
1391 Format(instr, "movz 'rd, 'rs, 'rt"); | 1394 Format(instr, "movz 'rd, 'rs, 'rt"); |
1392 break; | 1395 break; |
1393 case MOVN: | 1396 case MOVN: |
1394 Format(instr, "movn 'rd, 'rs, 'rt"); | 1397 Format(instr, "movn 'rd, 'rs, 'rt"); |
1395 break; | 1398 break; |
1396 case MOVCI: | 1399 case MOVCI: |
1397 if (instr->Bit(16)) { | 1400 if (instr->Bit(16)) { |
1398 Format(instr, "movt 'rd, 'rs, 'bc"); | 1401 Format(instr, "movt 'rd, 'rs, 'bc"); |
1399 } else { | 1402 } else { |
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2002 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 2005 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
2003 } | 2006 } |
2004 } | 2007 } |
2005 | 2008 |
2006 | 2009 |
2007 #undef UNSUPPORTED | 2010 #undef UNSUPPORTED |
2008 | 2011 |
2009 } // namespace disasm | 2012 } // namespace disasm |
2010 | 2013 |
2011 #endif // V8_TARGET_ARCH_MIPS64 | 2014 #endif // V8_TARGET_ARCH_MIPS64 |
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