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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_MIPS_CONSTANTS_H_ | 5 #ifndef V8_MIPS_CONSTANTS_H_ |
6 #define V8_MIPS_CONSTANTS_H_ | 6 #define V8_MIPS_CONSTANTS_H_ |
7 | 7 |
8 #include "src/base/logging.h" | 8 #include "src/base/logging.h" |
9 #include "src/base/macros.h" | 9 #include "src/base/macros.h" |
10 #include "src/globals.h" | 10 #include "src/globals.h" |
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377 SLLV = ((0U << 3) + 4), | 377 SLLV = ((0U << 3) + 4), |
378 LSA = ((0U << 3) + 5), | 378 LSA = ((0U << 3) + 5), |
379 SRLV = ((0U << 3) + 6), | 379 SRLV = ((0U << 3) + 6), |
380 SRAV = ((0U << 3) + 7), | 380 SRAV = ((0U << 3) + 7), |
381 | 381 |
382 JR = ((1U << 3) + 0), | 382 JR = ((1U << 3) + 0), |
383 JALR = ((1U << 3) + 1), | 383 JALR = ((1U << 3) + 1), |
384 MOVZ = ((1U << 3) + 2), | 384 MOVZ = ((1U << 3) + 2), |
385 MOVN = ((1U << 3) + 3), | 385 MOVN = ((1U << 3) + 3), |
386 BREAK = ((1U << 3) + 5), | 386 BREAK = ((1U << 3) + 5), |
| 387 SYNC = ((1U << 3) + 7), |
387 | 388 |
388 MFHI = ((2U << 3) + 0), | 389 MFHI = ((2U << 3) + 0), |
389 CLZ_R6 = ((2U << 3) + 0), | 390 CLZ_R6 = ((2U << 3) + 0), |
390 CLO_R6 = ((2U << 3) + 1), | 391 CLO_R6 = ((2U << 3) + 1), |
391 MFLO = ((2U << 3) + 2), | 392 MFLO = ((2U << 3) + 2), |
392 DCLZ_R6 = ((2U << 3) + 2), | 393 DCLZ_R6 = ((2U << 3) + 2), |
393 DCLO_R6 = ((2U << 3) + 3), | 394 DCLO_R6 = ((2U << 3) + 3), |
394 DSLLV = ((2U << 3) + 4), | 395 DSLLV = ((2U << 3) + 4), |
395 DLSA = ((2U << 3) + 5), | 396 DLSA = ((2U << 3) + 5), |
396 DSRLV = ((2U << 3) + 6), | 397 DSRLV = ((2U << 3) + 6), |
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638 | 639 |
639 // POP66 Encoding of rs Field. | 640 // POP66 Encoding of rs Field. |
640 JIC = ((0U << 5) + 0), | 641 JIC = ((0U << 5) + 0), |
641 | 642 |
642 // POP76 Encoding of rs Field. | 643 // POP76 Encoding of rs Field. |
643 JIALC = ((0U << 5) + 0), | 644 JIALC = ((0U << 5) + 0), |
644 | 645 |
645 NULLSF = 0U | 646 NULLSF = 0U |
646 }; | 647 }; |
647 | 648 |
648 | |
649 // ----- Emulated conditions. | 649 // ----- Emulated conditions. |
650 // On MIPS we use this enum to abstract from conditional branch instructions. | 650 // On MIPS we use this enum to abstract from conditional branch instructions. |
651 // The 'U' prefix is used to specify unsigned comparisons. | 651 // The 'U' prefix is used to specify unsigned comparisons. |
652 // Opposite conditions must be paired as odd/even numbers | 652 // Opposite conditions must be paired as odd/even numbers |
653 // because 'NegateCondition' function flips LSB to negate condition. | 653 // because 'NegateCondition' function flips LSB to negate condition. |
654 enum Condition { | 654 enum Condition { |
655 // Any value < 0 is considered no_condition. | 655 // Any value < 0 is considered no_condition. |
656 kNoCondition = -1, | 656 kNoCondition = -1, |
657 overflow = 0, | 657 overflow = 0, |
658 no_overflow = 1, | 658 no_overflow = 1, |
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957 FunctionFieldToBitNumber(SUB) | FunctionFieldToBitNumber(DSUB) | | 957 FunctionFieldToBitNumber(SUB) | FunctionFieldToBitNumber(DSUB) | |
958 FunctionFieldToBitNumber(SUBU) | FunctionFieldToBitNumber(DSUBU) | | 958 FunctionFieldToBitNumber(SUBU) | FunctionFieldToBitNumber(DSUBU) | |
959 FunctionFieldToBitNumber(AND) | FunctionFieldToBitNumber(OR) | | 959 FunctionFieldToBitNumber(AND) | FunctionFieldToBitNumber(OR) | |
960 FunctionFieldToBitNumber(XOR) | FunctionFieldToBitNumber(NOR) | | 960 FunctionFieldToBitNumber(XOR) | FunctionFieldToBitNumber(NOR) | |
961 FunctionFieldToBitNumber(SLT) | FunctionFieldToBitNumber(SLTU) | | 961 FunctionFieldToBitNumber(SLT) | FunctionFieldToBitNumber(SLTU) | |
962 FunctionFieldToBitNumber(TGE) | FunctionFieldToBitNumber(TGEU) | | 962 FunctionFieldToBitNumber(TGE) | FunctionFieldToBitNumber(TGEU) | |
963 FunctionFieldToBitNumber(TLT) | FunctionFieldToBitNumber(TLTU) | | 963 FunctionFieldToBitNumber(TLT) | FunctionFieldToBitNumber(TLTU) | |
964 FunctionFieldToBitNumber(TEQ) | FunctionFieldToBitNumber(TNE) | | 964 FunctionFieldToBitNumber(TEQ) | FunctionFieldToBitNumber(TNE) | |
965 FunctionFieldToBitNumber(MOVZ) | FunctionFieldToBitNumber(MOVN) | | 965 FunctionFieldToBitNumber(MOVZ) | FunctionFieldToBitNumber(MOVN) | |
966 FunctionFieldToBitNumber(MOVCI) | FunctionFieldToBitNumber(SELEQZ_S) | | 966 FunctionFieldToBitNumber(MOVCI) | FunctionFieldToBitNumber(SELEQZ_S) | |
967 FunctionFieldToBitNumber(SELNEZ_S); | 967 FunctionFieldToBitNumber(SELNEZ_S) | FunctionFieldToBitNumber(SYNC); |
968 | |
969 | 968 |
970 // Get the encoding type of the instruction. | 969 // Get the encoding type of the instruction. |
971 inline Type InstructionType(TypeChecks checks = NORMAL) const; | 970 inline Type InstructionType(TypeChecks checks = NORMAL) const; |
972 | 971 |
973 | 972 |
974 // Accessors for the different named fields used in the MIPS encoding. | 973 // Accessors for the different named fields used in the MIPS encoding. |
975 inline Opcode OpcodeValue() const { | 974 inline Opcode OpcodeValue() const { |
976 return static_cast<Opcode>( | 975 return static_cast<Opcode>( |
977 Bits(kOpcodeShift + kOpcodeBits - 1, kOpcodeShift)); | 976 Bits(kOpcodeShift + kOpcodeBits - 1, kOpcodeShift)); |
978 } | 977 } |
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1279 } | 1278 } |
1280 return kUnsupported; | 1279 return kUnsupported; |
1281 } | 1280 } |
1282 | 1281 |
1283 #undef OpcodeToBitNumber | 1282 #undef OpcodeToBitNumber |
1284 #undef FunctionFieldToBitNumber | 1283 #undef FunctionFieldToBitNumber |
1285 } // namespace internal | 1284 } // namespace internal |
1286 } // namespace v8 | 1285 } // namespace v8 |
1287 | 1286 |
1288 #endif // #ifndef V8_MIPS_CONSTANTS_H_ | 1287 #endif // #ifndef V8_MIPS_CONSTANTS_H_ |
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