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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_MIPS_CONSTANTS_H_ | 5 #ifndef V8_MIPS_CONSTANTS_H_ |
6 #define V8_MIPS_CONSTANTS_H_ | 6 #define V8_MIPS_CONSTANTS_H_ |
7 #include "src/globals.h" | 7 #include "src/globals.h" |
8 // UNIMPLEMENTED_ macro for MIPS. | 8 // UNIMPLEMENTED_ macro for MIPS. |
9 #ifdef DEBUG | 9 #ifdef DEBUG |
10 #define UNIMPLEMENTED_MIPS() \ | 10 #define UNIMPLEMENTED_MIPS() \ |
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402 SLLV = ((0U << 3) + 4), | 402 SLLV = ((0U << 3) + 4), |
403 LSA = ((0U << 3) + 5), | 403 LSA = ((0U << 3) + 5), |
404 SRLV = ((0U << 3) + 6), | 404 SRLV = ((0U << 3) + 6), |
405 SRAV = ((0U << 3) + 7), | 405 SRAV = ((0U << 3) + 7), |
406 | 406 |
407 JR = ((1U << 3) + 0), | 407 JR = ((1U << 3) + 0), |
408 JALR = ((1U << 3) + 1), | 408 JALR = ((1U << 3) + 1), |
409 MOVZ = ((1U << 3) + 2), | 409 MOVZ = ((1U << 3) + 2), |
410 MOVN = ((1U << 3) + 3), | 410 MOVN = ((1U << 3) + 3), |
411 BREAK = ((1U << 3) + 5), | 411 BREAK = ((1U << 3) + 5), |
| 412 SYNC = ((1U << 3) + 7), |
412 | 413 |
413 MFHI = ((2U << 3) + 0), | 414 MFHI = ((2U << 3) + 0), |
414 CLZ_R6 = ((2U << 3) + 0), | 415 CLZ_R6 = ((2U << 3) + 0), |
415 CLO_R6 = ((2U << 3) + 1), | 416 CLO_R6 = ((2U << 3) + 1), |
416 MFLO = ((2U << 3) + 2), | 417 MFLO = ((2U << 3) + 2), |
417 | 418 |
418 MULT = ((3U << 3) + 0), | 419 MULT = ((3U << 3) + 0), |
419 MULTU = ((3U << 3) + 1), | 420 MULTU = ((3U << 3) + 1), |
420 DIV = ((3U << 3) + 2), | 421 DIV = ((3U << 3) + 2), |
421 DIVU = ((3U << 3) + 3), | 422 DIVU = ((3U << 3) + 3), |
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613 | 614 |
614 // POP66 Encoding of rs Field. | 615 // POP66 Encoding of rs Field. |
615 JIC = ((0U << 5) + 0), | 616 JIC = ((0U << 5) + 0), |
616 | 617 |
617 // POP76 Encoding of rs Field. | 618 // POP76 Encoding of rs Field. |
618 JIALC = ((0U << 5) + 0), | 619 JIALC = ((0U << 5) + 0), |
619 | 620 |
620 NULLSF = 0U | 621 NULLSF = 0U |
621 }; | 622 }; |
622 | 623 |
623 | |
624 // ----- Emulated conditions. | 624 // ----- Emulated conditions. |
625 // On MIPS we use this enum to abstract from conditional branch instructions. | 625 // On MIPS we use this enum to abstract from conditional branch instructions. |
626 // The 'U' prefix is used to specify unsigned comparisons. | 626 // The 'U' prefix is used to specify unsigned comparisons. |
627 // Opposite conditions must be paired as odd/even numbers | 627 // Opposite conditions must be paired as odd/even numbers |
628 // because 'NegateCondition' function flips LSB to negate condition. | 628 // because 'NegateCondition' function flips LSB to negate condition. |
629 enum Condition { | 629 enum Condition { |
630 // Any value < 0 is considered no_condition. | 630 // Any value < 0 is considered no_condition. |
631 kNoCondition = -1, | 631 kNoCondition = -1, |
632 overflow = 0, | 632 overflow = 0, |
633 no_overflow = 1, | 633 no_overflow = 1, |
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921 FunctionFieldToBitNumber(ADD) | FunctionFieldToBitNumber(ADDU) | | 921 FunctionFieldToBitNumber(ADD) | FunctionFieldToBitNumber(ADDU) | |
922 FunctionFieldToBitNumber(SUB) | FunctionFieldToBitNumber(SUBU) | | 922 FunctionFieldToBitNumber(SUB) | FunctionFieldToBitNumber(SUBU) | |
923 FunctionFieldToBitNumber(AND) | FunctionFieldToBitNumber(OR) | | 923 FunctionFieldToBitNumber(AND) | FunctionFieldToBitNumber(OR) | |
924 FunctionFieldToBitNumber(XOR) | FunctionFieldToBitNumber(NOR) | | 924 FunctionFieldToBitNumber(XOR) | FunctionFieldToBitNumber(NOR) | |
925 FunctionFieldToBitNumber(SLT) | FunctionFieldToBitNumber(SLTU) | | 925 FunctionFieldToBitNumber(SLT) | FunctionFieldToBitNumber(SLTU) | |
926 FunctionFieldToBitNumber(TGE) | FunctionFieldToBitNumber(TGEU) | | 926 FunctionFieldToBitNumber(TGE) | FunctionFieldToBitNumber(TGEU) | |
927 FunctionFieldToBitNumber(TLT) | FunctionFieldToBitNumber(TLTU) | | 927 FunctionFieldToBitNumber(TLT) | FunctionFieldToBitNumber(TLTU) | |
928 FunctionFieldToBitNumber(TEQ) | FunctionFieldToBitNumber(TNE) | | 928 FunctionFieldToBitNumber(TEQ) | FunctionFieldToBitNumber(TNE) | |
929 FunctionFieldToBitNumber(MOVZ) | FunctionFieldToBitNumber(MOVN) | | 929 FunctionFieldToBitNumber(MOVZ) | FunctionFieldToBitNumber(MOVN) | |
930 FunctionFieldToBitNumber(MOVCI) | FunctionFieldToBitNumber(SELEQZ_S) | | 930 FunctionFieldToBitNumber(MOVCI) | FunctionFieldToBitNumber(SELEQZ_S) | |
931 FunctionFieldToBitNumber(SELNEZ_S); | 931 FunctionFieldToBitNumber(SELNEZ_S) | FunctionFieldToBitNumber(SYNC); |
932 | |
933 | 932 |
934 // Get the encoding type of the instruction. | 933 // Get the encoding type of the instruction. |
935 inline Type InstructionType(TypeChecks checks = NORMAL) const; | 934 inline Type InstructionType(TypeChecks checks = NORMAL) const; |
936 | 935 |
937 // Accessors for the different named fields used in the MIPS encoding. | 936 // Accessors for the different named fields used in the MIPS encoding. |
938 inline Opcode OpcodeValue() const { | 937 inline Opcode OpcodeValue() const { |
939 return static_cast<Opcode>( | 938 return static_cast<Opcode>( |
940 Bits(kOpcodeShift + kOpcodeBits - 1, kOpcodeShift)); | 939 Bits(kOpcodeShift + kOpcodeBits - 1, kOpcodeShift)); |
941 } | 940 } |
942 | 941 |
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1218 } | 1217 } |
1219 } | 1218 } |
1220 } | 1219 } |
1221 | 1220 |
1222 #undef OpcodeToBitNumber | 1221 #undef OpcodeToBitNumber |
1223 #undef FunctionFieldToBitNumber | 1222 #undef FunctionFieldToBitNumber |
1224 } // namespace internal | 1223 } // namespace internal |
1225 } // namespace v8 | 1224 } // namespace v8 |
1226 | 1225 |
1227 #endif // #ifndef V8_MIPS_CONSTANTS_H_ | 1226 #endif // #ifndef V8_MIPS_CONSTANTS_H_ |
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