[Subzero][MIPS] Implement conditional branches and integer comparisons

src/IceTargetLoweringMIPS32.cpp

Index: src/IceTargetLoweringMIPS32.cpp
diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
index 238b7bb9d8eb52dddae9b0685600022b5c0d1935..5b0556ee5f0120f8866b5a164983ed2c6cf23296 100644
--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -956,8 +956,104 @@ void TargetMIPS32::lowerFcmp(const InstFcmp *Instr) {
   UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerIcmp(const InstIcmp *Instr) {
+void TargetMIPS32::lower64Icmp(const InstIcmp *Instr) {
   UnimplementedLoweringError(this, Instr);
+  return;
+}
+
+void TargetMIPS32::lowerIcmp(const InstIcmp *Instr) {
+  auto *Src0 = Instr->getSrc(0);
+  auto *Src1 = Instr->getSrc(1);
+  if (Src0->getType() == IceType_i64) {
+    lower64Icmp(Instr);
+    return;
+  }
+  Variable *Dest = Instr->getDest();
+  if (isVectorType(Dest->getType())) {
+    UnimplementedLoweringError(this, Instr);
+    return;
+  }
+  InstIcmp::ICond Cond = Instr->getCondition();
+  auto *Src0R = legalizeToReg(Src0);
+  auto *Src1R = legalizeToReg(Src1);
+  switch (Cond) {
+  case InstIcmp::Eq: {
+    auto *DestT = I32Reg();
+    auto *T = I32Reg();
+    _xor(T, Src0R, Src1R);
+    _sltiu(DestT, T, 1);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Ne: {
+    auto *DestT = I32Reg();
+    auto *T = I32Reg();
+    auto *Zero = getZero();
+    _xor(T, Src0R, Src1R);
+    _sltu(DestT, Zero, T);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Ugt: {
+    auto *DestT = I32Reg();
+    _sltu(DestT, Src1R, Src0R);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Uge: {
+    auto *DestT = I32Reg();
+    auto *T = I32Reg();
+    _sltu(T, Src0R, Src1R);
+    _xori(DestT, T, 1);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Ult: {
+    auto *DestT = I32Reg();
+    _sltu(DestT, Src0R, Src1R);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Ule: {
+    auto *DestT = I32Reg();
+    auto *T = I32Reg();
+    _sltu(T, Src1R, Src0R);
+    _xori(DestT, T, 1);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Sgt: {
+    auto *DestT = I32Reg();
+    _slt(DestT, Src1R, Src0R);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Sge: {
+    auto *DestT = I32Reg();
+    auto *T = I32Reg();
+    _slt(T, Src1R, Src0R);
+    _xori(DestT, T, 1);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Slt: {
+    auto *DestT = I32Reg();
+    _slt(DestT, Src0R, Src1R);
+    _mov(Dest, DestT);
+    return;
+  }
+  case InstIcmp::Sle: {
+    auto *DestT = I32Reg();
+    auto *T = I32Reg();
+    _slt(T, Src1R, Src0R);
+    _xori(DestT, T, 1);
+    _mov(Dest, DestT);
+    return;
+  }
+  default:
+    llvm_unreachable("Invalid ICmp operator");
+    return;
+  }
 }
 
 void TargetMIPS32::lowerInsertElement(const InstInsertElement *Instr) {