OLD | NEW |
---|---|
1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
(...skipping 198 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
209 } | 209 } |
210 | 210 |
211 void _or(Variable *Dest, Variable *Src0, Variable *Src1) { | 211 void _or(Variable *Dest, Variable *Src0, Variable *Src1) { |
212 Context.insert<InstMIPS32Or>(Dest, Src0, Src1); | 212 Context.insert<InstMIPS32Or>(Dest, Src0, Src1); |
213 } | 213 } |
214 | 214 |
215 void _ori(Variable *Dest, Variable *Src, uint32_t Imm) { | 215 void _ori(Variable *Dest, Variable *Src, uint32_t Imm) { |
216 Context.insert<InstMIPS32Ori>(Dest, Src, Imm); | 216 Context.insert<InstMIPS32Ori>(Dest, Src, Imm); |
217 } | 217 } |
218 | 218 |
219 void _sub(Variable *Dest, Variable *Src0, Variable *Src1) { | 219 void _sub(Variable *Dest, Variable *Src0, Variable *Src1) { |
Jim Stichnoth
2016/04/19 16:44:02
Move this to be just before _sltu for sorting cons
sagar.thakur
2016/04/25 09:14:32
Done.
| |
220 Context.insert<InstMIPS32Sub>(Dest, Src0, Src1); | 220 Context.insert<InstMIPS32Sub>(Dest, Src0, Src1); |
221 } | 221 } |
222 | 222 |
223 void _slt(Variable *Dest, Variable *Src0, Variable *Src1) { | |
224 Context.insert<InstMIPS32Slt>(Dest, Src0, Src1); | |
225 } | |
226 | |
227 void _slti(Variable *Dest, Variable *Src, uint32_t Imm) { | |
228 Context.insert<InstMIPS32Slti>(Dest, Src, Imm); | |
229 } | |
230 | |
231 void _sltiu(Variable *Dest, Variable *Src, uint32_t Imm) { | |
232 Context.insert<InstMIPS32Sltiu>(Dest, Src, Imm); | |
233 } | |
234 | |
223 void _sltu(Variable *Dest, Variable *Src0, Variable *Src1) { | 235 void _sltu(Variable *Dest, Variable *Src0, Variable *Src1) { |
224 Context.insert<InstMIPS32Sltu>(Dest, Src0, Src1); | 236 Context.insert<InstMIPS32Sltu>(Dest, Src0, Src1); |
225 } | 237 } |
226 | 238 |
227 void _subu(Variable *Dest, Variable *Src0, Variable *Src1) { | 239 void _subu(Variable *Dest, Variable *Src0, Variable *Src1) { |
228 Context.insert<InstMIPS32Subu>(Dest, Src0, Src1); | 240 Context.insert<InstMIPS32Subu>(Dest, Src0, Src1); |
229 } | 241 } |
230 | 242 |
231 void _xor(Variable *Dest, Variable *Src0, Variable *Src1) { | 243 void _xor(Variable *Dest, Variable *Src0, Variable *Src1) { |
232 Context.insert<InstMIPS32Xor>(Dest, Src0, Src1); | 244 Context.insert<InstMIPS32Xor>(Dest, Src0, Src1); |
233 } | 245 } |
234 | 246 |
247 void _xori(Variable *Dest, Variable *Src, uint32_t Imm) { | |
248 Context.insert<InstMIPS32Xori>(Dest, Src, Imm); | |
249 } | |
250 | |
235 void lowerArguments() override; | 251 void lowerArguments() override; |
236 | 252 |
237 /// Operand legalization helpers. To deal with address mode constraints, | 253 /// Operand legalization helpers. To deal with address mode constraints, |
238 /// the helpers will create a new Operand and emit instructions that | 254 /// the helpers will create a new Operand and emit instructions that |
239 /// guarantee that the Operand kind is one of those indicated by the | 255 /// guarantee that the Operand kind is one of those indicated by the |
240 /// LegalMask (a bitmask of allowed kinds). If the input Operand is known | 256 /// LegalMask (a bitmask of allowed kinds). If the input Operand is known |
241 /// to already meet the constraints, it may be simply returned as the result, | 257 /// to already meet the constraints, it may be simply returned as the result, |
242 /// without creating any new instructions or operands. | 258 /// without creating any new instructions or operands. |
243 enum OperandLegalization { | 259 enum OperandLegalization { |
244 Legal_None = 0, | 260 Legal_None = 0, |
245 Legal_Reg = 1 << 0, // physical register, not stack location | 261 Legal_Reg = 1 << 0, // physical register, not stack location |
246 Legal_Imm = 1 << 1, | 262 Legal_Imm = 1 << 1, |
247 Legal_Mem = 1 << 2, | 263 Legal_Mem = 1 << 2, |
248 Legal_Default = ~Legal_None | 264 Legal_Default = ~Legal_None |
249 }; | 265 }; |
250 typedef uint32_t LegalMask; | 266 typedef uint32_t LegalMask; |
251 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default, | 267 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default, |
252 RegNumT RegNum = RegNumT()); | 268 RegNumT RegNum = RegNumT()); |
253 | 269 |
254 Variable *legalizeToVar(Operand *From, RegNumT RegNum = RegNumT()); | 270 Variable *legalizeToVar(Operand *From, RegNumT RegNum = RegNumT()); |
255 | 271 |
256 Variable *legalizeToReg(Operand *From, RegNumT RegNum = RegNumT()); | 272 Variable *legalizeToReg(Operand *From, RegNumT RegNum = RegNumT()); |
257 | 273 |
258 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT()); | 274 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT()); |
259 | 275 |
276 Variable *getZero() { | |
277 return getPhysicalRegister(RegMIPS32::Reg_ZERO, IceType_i32); | |
278 } | |
279 | |
260 Variable *I32Reg(RegNumT RegNum = RegNumT()) { | 280 Variable *I32Reg(RegNumT RegNum = RegNumT()) { |
261 return makeReg(IceType_i32, RegNum); | 281 return makeReg(IceType_i32, RegNum); |
262 } | 282 } |
263 | 283 |
264 static Type stackSlotType(); | 284 static Type stackSlotType(); |
265 Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT()); | 285 Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT()); |
266 | 286 |
267 void addProlog(CfgNode *Node) override; | 287 void addProlog(CfgNode *Node) override; |
268 void addEpilog(CfgNode *Node) override; | 288 void addEpilog(CfgNode *Node) override; |
269 | 289 |
(...skipping 16 matching lines...) Expand all Loading... | |
286 void lowerInt64Arithmetic(const InstArithmetic *Instr, Variable *Dest, | 306 void lowerInt64Arithmetic(const InstArithmetic *Instr, Variable *Dest, |
287 Operand *Src0, Operand *Src1); | 307 Operand *Src0, Operand *Src1); |
288 void lowerAssign(const InstAssign *Instr) override; | 308 void lowerAssign(const InstAssign *Instr) override; |
289 void lowerBr(const InstBr *Instr) override; | 309 void lowerBr(const InstBr *Instr) override; |
290 void lowerBreakpoint(const InstBreakpoint *Instr) override; | 310 void lowerBreakpoint(const InstBreakpoint *Instr) override; |
291 void lowerCall(const InstCall *Instr) override; | 311 void lowerCall(const InstCall *Instr) override; |
292 void lowerCast(const InstCast *Instr) override; | 312 void lowerCast(const InstCast *Instr) override; |
293 void lowerExtractElement(const InstExtractElement *Instr) override; | 313 void lowerExtractElement(const InstExtractElement *Instr) override; |
294 void lowerFcmp(const InstFcmp *Instr) override; | 314 void lowerFcmp(const InstFcmp *Instr) override; |
295 void lowerIcmp(const InstIcmp *Instr) override; | 315 void lowerIcmp(const InstIcmp *Instr) override; |
316 void lower64Icmp(const InstIcmp *Instr); | |
296 void lowerIntrinsicCall(const InstIntrinsicCall *Instr) override; | 317 void lowerIntrinsicCall(const InstIntrinsicCall *Instr) override; |
297 void lowerInsertElement(const InstInsertElement *Instr) override; | 318 void lowerInsertElement(const InstInsertElement *Instr) override; |
298 void lowerLoad(const InstLoad *Instr) override; | 319 void lowerLoad(const InstLoad *Instr) override; |
299 void lowerPhi(const InstPhi *Instr) override; | 320 void lowerPhi(const InstPhi *Instr) override; |
300 void lowerRet(const InstRet *Instr) override; | 321 void lowerRet(const InstRet *Instr) override; |
301 void lowerSelect(const InstSelect *Instr) override; | 322 void lowerSelect(const InstSelect *Instr) override; |
302 void lowerStore(const InstStore *Instr) override; | 323 void lowerStore(const InstStore *Instr) override; |
303 void lowerSwitch(const InstSwitch *Instr) override; | 324 void lowerSwitch(const InstSwitch *Instr) override; |
304 void lowerUnreachable(const InstUnreachable *Instr) override; | 325 void lowerUnreachable(const InstUnreachable *Instr) override; |
305 void prelowerPhis() override; | 326 void prelowerPhis() override; |
(...skipping 62 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
368 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 389 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
369 | 390 |
370 private: | 391 private: |
371 ~TargetHeaderMIPS32() = default; | 392 ~TargetHeaderMIPS32() = default; |
372 }; | 393 }; |
373 | 394 |
374 } // end of namespace MIPS32 | 395 } // end of namespace MIPS32 |
375 } // end of namespace Ice | 396 } // end of namespace Ice |
376 | 397 |
377 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 398 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
OLD | NEW |