[turbofan] store block id with instruction

src/compiler/instruction.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_INSTRUCTION_H_
 #define V8_COMPILER_INSTRUCTION_H_
 
 #include <deque>
 #include <iosfwd>
 #include <map>
@@ skipping 697 matching lines @@
 
  private:
   friend std::ostream& operator<<(std::ostream& os, const ReferenceMap& pm);
 
   ZoneVector<InstructionOperand> reference_operands_;
   int instruction_position_;
 };
 
 std::ostream& operator<<(std::ostream& os, const ReferenceMap& pm);
 
+class InstructionBlock;
+
 class Instruction final {
  public:
   size_t OutputCount() const { return OutputCountField::decode(bit_field_); }
   const InstructionOperand* OutputAt(size_t i) const {
     DCHECK(i < OutputCount());
     return &operands_[i];
   }
   InstructionOperand* OutputAt(size_t i) {
     DCHECK(i < OutputCount());
     return &operands_[i];
@@ skipping 122 matching lines @@
 
   const ParallelMove* GetParallelMove(GapPosition pos) const {
     return parallel_moves_[pos];
   }
 
   bool AreMovesRedundant() const;
 
   ParallelMove* const* parallel_moves() const { return &parallel_moves_[0]; }
   ParallelMove** parallel_moves() { return &parallel_moves_[0]; }
 
+  // The block_id may be invalidated in JumpThreading. It is only important for
+  // register allocation, to avoid searching for blocks from instruction
+  // indexes.
+  InstructionBlock* block() const { return block_; }
+  void set_block(InstructionBlock* block) {
+    DCHECK_NOT_NULL(block);
+    block_ = block;
+  }
+
   void Print(const RegisterConfiguration* config) const;
   void Print() const;
 
  private:
   explicit Instruction(InstructionCode opcode);
 
   Instruction(InstructionCode opcode, size_t output_count,
               InstructionOperand* outputs, size_t input_count,
               InstructionOperand* inputs, size_t temp_count,
               InstructionOperand* temps);
 
   typedef BitField<size_t, 0, 8> OutputCountField;
   typedef BitField<size_t, 8, 16> InputCountField;
   typedef BitField<size_t, 24, 6> TempCountField;
   typedef BitField<bool, 30, 1> IsCallField;
 
   InstructionCode opcode_;
   uint32_t bit_field_;
   ParallelMove* parallel_moves_[2];
   ReferenceMap* reference_map_;
+  InstructionBlock* block_;
   InstructionOperand operands_[1];
 
   DISALLOW_COPY_AND_ASSIGN(Instruction);
 };
 
 
 struct PrintableInstruction {
   const RegisterConfiguration* register_configuration_;
   const Instruction* instr_;
 };
@@ skipping 497 matching lines @@
  private:
   friend std::ostream& operator<<(std::ostream& os,
                                   const PrintableInstructionSequence& code);
 
   typedef ZoneMap<const Instruction*, SourcePosition> SourcePositionMap;
 
   Isolate* isolate_;
   Zone* const zone_;
   InstructionBlocks* const instruction_blocks_;
   SourcePositionMap source_positions_;
-  IntVector block_starts_;
   ConstantMap constants_;
   Immediates immediates_;
   InstructionDeque instructions_;
   int next_virtual_register_;
   ReferenceMapDeque reference_maps_;
   ZoneVector<MachineRepresentation> representations_;
   DeoptimizationVector deoptimization_entries_;
 
+  // Used at construction time
+  InstructionBlock* current_block_;
+
   DISALLOW_COPY_AND_ASSIGN(InstructionSequence);
 };
 
 
 struct PrintableInstructionSequence {
   const RegisterConfiguration* register_configuration_;
   const InstructionSequence* sequence_;
 };
 
 
 std::ostream& operator<<(std::ostream& os,
                          const PrintableInstructionSequence& code);
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_INSTRUCTION_H_