| Index: src/DartARM32/assembler_arm.cc
|
| diff --git a/src/DartARM32/assembler_arm.cc b/src/DartARM32/assembler_arm.cc
|
| index c2cdead0a363765842ca13e1a859b60eb0666d3e..961299ec0b7243661f283c5e0368a1b54e9afa39 100644
|
| --- a/src/DartARM32/assembler_arm.cc
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| +++ b/src/DartARM32/assembler_arm.cc
|
| @@ -1323,11 +1323,11 @@ void Assembler::vornq(QRegister qd, QRegister qn, QRegister qm) {
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| void Assembler::vandq(QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B8 | B4, kByte, qd, qn, qm);
|
| }
|
| -#endif
|
|
|
| void Assembler::vmvnq(QRegister qd, QRegister qm) {
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| EmitSIMDqqq(B25 | B24 | B23 | B10 | B8 | B7, kWordPair, qd, Q0, qm);
|
| }
|
| +#endif
|
|
|
|
|
| void Assembler::vminqs(QRegister qd, QRegister qn, QRegister qm) {
|
| @@ -1422,52 +1422,52 @@ void Assembler::vzipqw(QRegister qd, QRegister qm) {
|
| }
|
|
|
|
|
| +#if 0
|
| +// Moved to Arm32::AssemblerARM32::vceqqi().
|
| void Assembler::vceqqi(OperandSize sz,
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| QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B24 | B11 | B4, sz, qd, qn, qm);
|
| }
|
|
|
| -
|
| +// Moved to Arm32::AssemblerARM32::vceqqi().
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| void Assembler::vceqqs(QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B11 | B10 | B9, kSWord, qd, qn, qm);
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| }
|
|
|
| -
|
| +// Moved to Arm32::AssemblerARM32::vcgeqi().
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| void Assembler::vcgeqi(OperandSize sz,
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| QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B9 | B8 | B4, sz, qd, qn, qm);
|
| }
|
|
|
| -
|
| +// Moved to Arm32::AssemblerARM32::vcugeqi().
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| void Assembler::vcugeqi(OperandSize sz,
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| QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B24 | B9 | B8 | B4, sz, qd, qn, qm);
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| }
|
|
|
| -
|
| +// Moved to Arm32::AssemblerARM32::vcgeqs().
|
| void Assembler::vcgeqs(QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B24 | B11 | B10 | B9, kSWord, qd, qn, qm);
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| }
|
|
|
| -
|
| +// Moved to Arm32::AssemblerARM32::vcgtqi().
|
| void Assembler::vcgtqi(OperandSize sz,
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| QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B9 | B8, sz, qd, qn, qm);
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| }
|
|
|
| -
|
| +// Moved to Arm32::AssemblerARM32::vcugtqi().
|
| void Assembler::vcugtqi(OperandSize sz,
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| QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B24 | B9 | B8, sz, qd, qn, qm);
|
| }
|
|
|
| -
|
| +// Moved to Arm32::AssemblerARM32::vcgtqs().
|
| void Assembler::vcgtqs(QRegister qd, QRegister qn, QRegister qm) {
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| EmitSIMDqqq(B24 | B21 | B11 | B10 | B9, kSWord, qd, qn, qm);
|
| }
|
|
|
| -
|
| -#if 0
|
| // Moved to ARM32::AssemblerARM32::bkpt()
|
| void Assembler::bkpt(uint16_t imm16) {
|
| Emit(BkptEncoding(imm16));
|
|
|