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Side by Side Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 1891033002: [Atomics] Remove Atomics code stubs; use TF ops (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: remove s390 code stub Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 1796 matching lines...) Expand 10 before | Expand all | Expand 10 after
1807 CanCover(node, left)) { 1807 CanCover(node, left)) {
1808 left = left->InputAt(1); 1808 left = left->InputAt(1);
1809 Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(left), 1809 Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(left),
1810 g.UseRegister(right)); 1810 g.UseRegister(right));
1811 return; 1811 return;
1812 } 1812 }
1813 Emit(kArmVmovHighF64U32, g.DefineSameAsFirst(node), g.UseRegister(left), 1813 Emit(kArmVmovHighF64U32, g.DefineSameAsFirst(node), g.UseRegister(left),
1814 g.UseRegister(right)); 1814 g.UseRegister(right));
1815 } 1815 }
1816 1816
1817 void InstructionSelector::VisitAtomicLoad(Node* node) {
1818 LoadRepresentation load_rep = LoadRepresentationOf(node->op());
1819 ArmOperandGenerator g(this);
1820 Node* base = node->InputAt(0);
1821 Node* index = node->InputAt(1);
1822 ArchOpcode opcode = kArchNop;
1823 switch (load_rep.representation()) {
1824 case MachineRepresentation::kWord8:
1825 opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
1826 break;
1827 case MachineRepresentation::kWord16:
1828 opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
1829 break;
1830 case MachineRepresentation::kWord32:
1831 opcode = kAtomicLoadWord32;
1832 break;
1833 default:
1834 UNREACHABLE();
1835 return;
1836 }
1837 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR),
1838 g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
1839 }
1817 1840
1818 // static 1841 // static
1819 MachineOperatorBuilder::Flags 1842 MachineOperatorBuilder::Flags
1820 InstructionSelector::SupportedMachineOperatorFlags() { 1843 InstructionSelector::SupportedMachineOperatorFlags() {
1821 MachineOperatorBuilder::Flags flags = 1844 MachineOperatorBuilder::Flags flags =
1822 MachineOperatorBuilder::kInt32DivIsSafe | 1845 MachineOperatorBuilder::kInt32DivIsSafe |
1823 MachineOperatorBuilder::kUint32DivIsSafe; 1846 MachineOperatorBuilder::kUint32DivIsSafe;
1824 if (CpuFeatures::IsSupported(ARMv7)) { 1847 if (CpuFeatures::IsSupported(ARMv7)) {
1825 flags |= MachineOperatorBuilder::kWord32ReverseBits; 1848 flags |= MachineOperatorBuilder::kWord32ReverseBits;
1826 } 1849 }
(...skipping 11 matching lines...) Expand all
1838 MachineOperatorBuilder::kFloat32Max | 1861 MachineOperatorBuilder::kFloat32Max |
1839 MachineOperatorBuilder::kFloat64Min | 1862 MachineOperatorBuilder::kFloat64Min |
1840 MachineOperatorBuilder::kFloat64Max; 1863 MachineOperatorBuilder::kFloat64Max;
1841 } 1864 }
1842 return flags; 1865 return flags;
1843 } 1866 }
1844 1867
1845 } // namespace compiler 1868 } // namespace compiler
1846 } // namespace internal 1869 } // namespace internal
1847 } // namespace v8 1870 } // namespace v8
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