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Side by Side Diff: src/IceCfgNode.cpp

Issue 1890283002: Subzero, Wasm: Link and run torture tests; bug fixes. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review feedback Created 4 years, 8 months ago
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1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===// 1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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21 #include "IceInst.h" 21 #include "IceInst.h"
22 #include "IceInstVarIter.h" 22 #include "IceInstVarIter.h"
23 #include "IceLiveness.h" 23 #include "IceLiveness.h"
24 #include "IceOperand.h" 24 #include "IceOperand.h"
25 #include "IceTargetLowering.h" 25 #include "IceTargetLowering.h"
26 26
27 namespace Ice { 27 namespace Ice {
28 28
29 // Adds an instruction to either the Phi list or the regular instruction list. 29 // Adds an instruction to either the Phi list or the regular instruction list.
30 // Validates that all Phis are added before all regular instructions. 30 // Validates that all Phis are added before all regular instructions.
31 void CfgNode::appendInst(Inst *Instr, bool AllowPhisAnywhere) { 31 void CfgNode::appendInst(Inst *Instr) {
32 ++InstCountEstimate; 32 ++InstCountEstimate;
33 33
34 if (BuildDefs::wasm()) { 34 if (BuildDefs::wasm()) {
35 if (llvm::isa<InstSwitch>(Instr) || llvm::isa<InstBr>(Instr)) { 35 if (llvm::isa<InstSwitch>(Instr) || llvm::isa<InstBr>(Instr)) {
36 for (auto *N : Instr->getTerminatorEdges()) { 36 for (auto *N : Instr->getTerminatorEdges()) {
37 N->addInEdge(this); 37 N->addInEdge(this);
38 addOutEdge(N); 38 addOutEdge(N);
39 } 39 }
40 } 40 }
41 } 41 }
42 42
43 if (auto *Phi = llvm::dyn_cast<InstPhi>(Instr)) { 43 if (auto *Phi = llvm::dyn_cast<InstPhi>(Instr)) {
44 if (!AllowPhisAnywhere && !Insts.empty()) { 44 if (!Insts.empty()) {
45 Func->setError("Phi instruction added to the middle of a block"); 45 Func->setError("Phi instruction added to the middle of a block");
46 return; 46 return;
47 } 47 }
48 Phis.push_back(Phi); 48 Phis.push_back(Phi);
49 } else { 49 } else {
50 Insts.push_back(Instr); 50 Insts.push_back(Instr);
51 } 51 }
52 } 52 }
53 53
54 namespace { 54 namespace {
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77 // have to be built up incrementally. After the CFG has been constructed, the 77 // have to be built up incrementally. After the CFG has been constructed, the
78 // computePredecessors() pass finalizes it by creating the InEdges list. 78 // computePredecessors() pass finalizes it by creating the InEdges list.
79 void CfgNode::computePredecessors() { 79 void CfgNode::computePredecessors() {
80 for (CfgNode *Succ : OutEdges) 80 for (CfgNode *Succ : OutEdges)
81 Succ->InEdges.push_back(this); 81 Succ->InEdges.push_back(this);
82 } 82 }
83 83
84 void CfgNode::computeSuccessors() { 84 void CfgNode::computeSuccessors() {
85 OutEdges.clear(); 85 OutEdges.clear();
86 InEdges.clear(); 86 InEdges.clear();
87 assert(!Insts.empty());
87 OutEdges = Insts.rbegin()->getTerminatorEdges(); 88 OutEdges = Insts.rbegin()->getTerminatorEdges();
88 } 89 }
89 90
90 // Ensure each Phi instruction in the node is consistent with respect to control 91 // Ensure each Phi instruction in the node is consistent with respect to control
91 // flow. For each predecessor, there must be a phi argument with that label. 92 // flow. For each predecessor, there must be a phi argument with that label.
92 // If a phi argument's label doesn't appear in the predecessor list (which can 93 // If a phi argument's label doesn't appear in the predecessor list (which can
93 // happen as a result of e.g. unreachable node elimination), its value is 94 // happen as a result of e.g. unreachable node elimination), its value is
94 // modified to be zero, to maintain consistency in liveness analysis. This 95 // modified to be zero, to maintain consistency in liveness analysis. This
95 // allows us to remove some dead control flow without a major rework of the phi 96 // allows us to remove some dead control flow without a major rework of the phi
96 // instructions. We don't check that phi arguments with the same label have the 97 // instructions. We don't check that phi arguments with the same label have the
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1465 auto *Instr = InstIntrinsicCall::create( 1466 auto *Instr = InstIntrinsicCall::create(
1466 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); 1467 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
1467 Instr->addArg(AtomicRMWOp); 1468 Instr->addArg(AtomicRMWOp);
1468 Instr->addArg(Counter); 1469 Instr->addArg(Counter);
1469 Instr->addArg(One); 1470 Instr->addArg(One);
1470 Instr->addArg(OrderAcquireRelease); 1471 Instr->addArg(OrderAcquireRelease);
1471 Insts.push_front(Instr); 1472 Insts.push_front(Instr);
1472 } 1473 }
1473 1474
1474 } // end of namespace Ice 1475 } // end of namespace Ice
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