Subzero, Wasm: Link and run torture tests; bug fixes.

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1137 matching lines @@
 void TargetMIPS32::lowerStore(const InstStore *Instr) {
   UnimplementedLoweringError(this, Instr);
 }
 
 void TargetMIPS32::doAddressOptStore() { UnimplementedError(getFlags()); }
 
 void TargetMIPS32::lowerSwitch(const InstSwitch *Instr) {
   UnimplementedLoweringError(this, Instr);
 }
 
+void TargetMIPS32::lowerBreakpoint(const InstBreakpoint *Instr) {
+  UnimplementedLoweringError(this, Instr);
+}
+
 void TargetMIPS32::lowerUnreachable(const InstUnreachable *Instr) {
   UnimplementedLoweringError(this, Instr);
 }
 
 // Turn an i64 Phi instruction into a pair of i32 Phi instructions, to preserve
 // integrity of liveness analysis. Undef values are also turned into zeroes,
 // since loOperand() and hiOperand() don't expect Undef input.
 void TargetMIPS32::prelowerPhis() {
   PhiLowering::prelowerPhis32Bit<TargetMIPS32>(this, Context.getNode(), Func);
 }
@@ skipping 150 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice