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| 1 /* | 1 /* |
| 2 * Copyright (C) 2011, Google Inc. All rights reserved. | 2 * Copyright (C) 2011, Google Inc. All rights reserved. |
| 3 * | 3 * |
| 4 * Redistribution and use in source and binary forms, with or without | 4 * Redistribution and use in source and binary forms, with or without |
| 5 * modification, are permitted provided that the following conditions | 5 * modification, are permitted provided that the following conditions |
| 6 * are met: | 6 * are met: |
| 7 * 1. Redistributions of source code must retain the above copyright | 7 * 1. Redistributions of source code must retain the above copyright |
| 8 * notice, this list of conditions and the following disclaimer. | 8 * notice, this list of conditions and the following disclaimer. |
| 9 * 2. Redistributions in binary form must reproduce the above copyright | 9 * 2. Redistributions in binary form must reproduce the above copyright |
| 10 * notice, this list of conditions and the following disclaimer in the | 10 * notice, this list of conditions and the following disclaimer in the |
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| 124 | 124 |
| 125 inline void restoreState() | 125 inline void restoreState() |
| 126 { | 126 { |
| 127 setStatusWord(m_savedCSR); | 127 setStatusWord(m_savedCSR); |
| 128 } | 128 } |
| 129 | 129 |
| 130 inline int getStatusWord() | 130 inline int getStatusWord() |
| 131 { | 131 { |
| 132 int result; | 132 int result; |
| 133 #if CPU(ARM64) | 133 #if CPU(ARM64) |
| 134 asm volatile("mrs %[result], FPCR" : [result] "=r" (result)); | 134 asm volatile("mrs %x[result], FPCR" : [result] "=r" (result)); |
| 135 #else | 135 #else |
| 136 asm volatile("vmrs %[result], FPSCR" : [result] "=r" (result)); | 136 asm volatile("vmrs %[result], FPSCR" : [result] "=r" (result)); |
| 137 #endif | 137 #endif |
| 138 return result; | 138 return result; |
| 139 } | 139 } |
| 140 | 140 |
| 141 inline void setStatusWord(int a) | 141 inline void setStatusWord(int a) |
| 142 { | 142 { |
| 143 #if CPU(ARM64) | 143 #if CPU(ARM64) |
| 144 asm volatile("msr FPCR, %[src]" : : [src] "r" (a)); | 144 asm volatile("msr FPCR, %x[src]" : : [src] "r" (a)); |
| 145 #else | 145 #else |
| 146 asm volatile("vmsr FPSCR, %[src]" : : [src] "r" (a)); | 146 asm volatile("vmsr FPSCR, %[src]" : : [src] "r" (a)); |
| 147 #endif | 147 #endif |
| 148 } | 148 } |
| 149 | 149 |
| 150 #endif | 150 #endif |
| 151 | 151 |
| 152 }; | 152 }; |
| 153 | 153 |
| 154 #else | 154 #else |
| 155 // FIXME: add implementations for other architectures and compilers | 155 // FIXME: add implementations for other architectures and compilers |
| 156 class DenormalDisabler { | 156 class DenormalDisabler { |
| 157 public: | 157 public: |
| 158 DenormalDisabler() { } | 158 DenormalDisabler() { } |
| 159 | 159 |
| 160 // Assume the worst case that other architectures and compilers | 160 // Assume the worst case that other architectures and compilers |
| 161 // need to flush denormals to zero manually. | 161 // need to flush denormals to zero manually. |
| 162 static inline float flushDenormalFloatToZero(float f) | 162 static inline float flushDenormalFloatToZero(float f) |
| 163 { | 163 { |
| 164 return (fabs(f) < FLT_MIN) ? 0.0f : f; | 164 return (fabs(f) < FLT_MIN) ? 0.0f : f; |
| 165 } | 165 } |
| 166 }; | 166 }; |
| 167 | 167 |
| 168 #endif | 168 #endif |
| 169 | 169 |
| 170 } // namespace blink | 170 } // namespace blink |
| 171 | 171 |
| 172 #undef HAVE_DENORMAL | 172 #undef HAVE_DENORMAL |
| 173 #endif // DenormalDisabler_h | 173 #endif // DenormalDisabler_h |
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