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| 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "base/cpu.h" | 5 #include "base/cpu.h" |
| 6 | 6 |
| 7 #include <string.h> | 7 #include <string.h> |
| 8 | 8 |
| 9 #include <algorithm> | 9 #include <algorithm> |
| 10 | 10 |
| 11 #include "base/basictypes.h" | 11 #include "base/basictypes.h" |
| 12 #include "base/file_util.h" | |
| 13 #include "base/lazy_instance.h" | |
| 12 #include "build/build_config.h" | 14 #include "build/build_config.h" |
| 13 | 15 |
| 14 #if defined(ARCH_CPU_X86_FAMILY) | 16 #if defined(ARCH_CPU_X86_FAMILY) |
| 15 #if defined(_MSC_VER) | 17 #if defined(_MSC_VER) |
| 16 #include <intrin.h> | 18 #include <intrin.h> |
| 17 #include <immintrin.h> // For _xgetbv() | 19 #include <immintrin.h> // For _xgetbv() |
| 18 #endif | 20 #endif |
| 19 #endif | 21 #endif |
| 20 | 22 |
| 21 namespace base { | 23 namespace base { |
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| 79 | 81 |
| 80 __asm__ volatile ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (xcr)); | 82 __asm__ volatile ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (xcr)); |
| 81 return (static_cast<uint64>(edx) << 32) | eax; | 83 return (static_cast<uint64>(edx) << 32) | eax; |
| 82 } | 84 } |
| 83 | 85 |
| 84 #endif // !_MSC_VER | 86 #endif // !_MSC_VER |
| 85 #endif // ARCH_CPU_X86_FAMILY | 87 #endif // ARCH_CPU_X86_FAMILY |
| 86 | 88 |
| 87 } // anonymous namespace | 89 } // anonymous namespace |
| 88 | 90 |
| 91 #if defined(ARCH_CPU_ARM_FAMILY) | |
| 92 #if defined(OS_ANDROID) || defined(USE_AURA) | |
|
Mark Mentovai
2014/03/11 16:17:48
This code is valid on any ARM Linux, right? That’s
rptr
2014/03/12 15:26:25
Done.
| |
| 93 | |
| 94 std::string ParseCpuInfo() { | |
|
Mark Mentovai
2014/03/11 16:17:48
All of this should be in the unnamed namespace.
rptr
2014/03/12 15:26:25
Done.
| |
| 95 const char kProcessorPrefix[] = "Processor"; | |
| 96 std::string contents, cpu_brand; | |
| 97 ReadFileToString(FilePath("/proc/cpuinfo"), &contents); | |
| 98 DCHECK(!contents.empty()); | |
| 99 if (!contents.empty()) { | |
| 100 std::istringstream iss(contents); | |
| 101 std::string line; | |
| 102 while (std::getline(iss, line)) { | |
| 103 if (line.compare(0, strlen(kProcessorPrefix), kProcessorPrefix) == 0) { | |
| 104 size_t pos = line.find(": "); | |
| 105 if (pos != std::string::npos) { | |
| 106 cpu_brand.assign(line.substr(pos + 2)); | |
| 107 break; | |
| 108 } | |
| 109 } | |
| 110 } | |
| 111 } | |
| 112 return cpu_brand; | |
| 113 } | |
| 114 | |
| 115 class LazyCpuInfoValue { | |
| 116 public: | |
| 117 LazyCpuInfoValue() : value_(ParseCpuInfo()) {} | |
| 118 const std::string& value() { return value_; } | |
| 119 | |
| 120 private: | |
| 121 const std::string value_; | |
| 122 DISALLOW_COPY_AND_ASSIGN(LazyCpuInfoValue); | |
| 123 }; | |
| 124 | |
| 125 base::LazyInstance<LazyCpuInfoValue> g_lazy_cpu_brand = | |
| 126 LAZY_INSTANCE_INITIALIZER; | |
| 127 | |
| 128 const std::string& CpuBrandInfo() { return g_lazy_cpu_brand.Get().value(); } | |
| 129 | |
| 130 #endif // defined(OS_ANDROID) || defined(USE_AURA) | |
| 131 #endif // ARCH_CPU_ARM_FAMILY | |
| 132 | |
| 89 void CPU::Initialize() { | 133 void CPU::Initialize() { |
| 90 #if defined(ARCH_CPU_X86_FAMILY) | 134 #if defined(ARCH_CPU_X86_FAMILY) |
| 91 int cpu_info[4] = {-1}; | 135 int cpu_info[4] = {-1}; |
| 92 char cpu_string[48]; | 136 char cpu_string[48]; |
| 93 | 137 |
| 94 // __cpuid with an InfoType argument of 0 returns the number of | 138 // __cpuid with an InfoType argument of 0 returns the number of |
| 95 // valid Ids in CPUInfo[0] and the CPU identification string in | 139 // valid Ids in CPUInfo[0] and the CPU identification string in |
| 96 // the other three array elements. The CPU identification string is | 140 // the other three array elements. The CPU identification string is |
| 97 // not in linear order. The code below arranges the information | 141 // not in linear order. The code below arranges the information |
| 98 // in a human readable form. The human readable order is CPUInfo[1] | | 142 // in a human readable form. The human readable order is CPUInfo[1] | |
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| 151 } | 195 } |
| 152 cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); | 196 cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); |
| 153 } | 197 } |
| 154 | 198 |
| 155 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; | 199 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; |
| 156 if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { | 200 if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { |
| 157 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); | 201 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); |
| 158 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; | 202 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; |
| 159 } | 203 } |
| 160 #elif defined(ARCH_CPU_ARM_FAMILY) | 204 #elif defined(ARCH_CPU_ARM_FAMILY) |
| 161 // TODO(piman): Expand this. ARM has a CPUID register, but it's not available | 205 #if defined(OS_ANDROID) || defined(USE_AURA) |
| 162 // in user mode. /proc/cpuinfo has some information, but it's non standard, | 206 cpu_brand_.assign(CpuBrandInfo()); |
| 163 // platform-specific, and not accessible from the sandbox. | 207 #endif |
| 164 // For some purposes, this first approximation is enough. | |
| 165 // crbug.com/313454 | |
| 166 cpu_brand_.assign("ARM"); | |
| 167 #endif | 208 #endif |
| 168 } | 209 } |
| 169 | 210 |
| 170 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { | 211 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { |
| 171 if (has_avx()) return AVX; | 212 if (has_avx()) return AVX; |
| 172 if (has_sse42()) return SSE42; | 213 if (has_sse42()) return SSE42; |
| 173 if (has_sse41()) return SSE41; | 214 if (has_sse41()) return SSE41; |
| 174 if (has_ssse3()) return SSSE3; | 215 if (has_ssse3()) return SSSE3; |
| 175 if (has_sse3()) return SSE3; | 216 if (has_sse3()) return SSE3; |
| 176 if (has_sse2()) return SSE2; | 217 if (has_sse2()) return SSE2; |
| 177 if (has_sse()) return SSE; | 218 if (has_sse()) return SSE; |
| 178 return PENTIUM; | 219 return PENTIUM; |
| 179 } | 220 } |
| 180 | 221 |
| 181 } // namespace base | 222 } // namespace base |
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