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1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "base/cpu.h" | 5 #include "base/cpu.h" |
6 | 6 |
7 #include <string.h> | 7 #include <string.h> |
8 | 8 |
9 #include <algorithm> | 9 #include <algorithm> |
10 | 10 |
11 #include "base/basictypes.h" | 11 #include "base/basictypes.h" |
12 #include "base/file_util.h" | |
13 #include "base/lazy_instance.h" | |
12 #include "build/build_config.h" | 14 #include "build/build_config.h" |
13 | 15 |
14 #if defined(ARCH_CPU_X86_FAMILY) | 16 #if defined(ARCH_CPU_X86_FAMILY) |
15 #if defined(_MSC_VER) | 17 #if defined(_MSC_VER) |
16 #include <intrin.h> | 18 #include <intrin.h> |
17 #include <immintrin.h> // For _xgetbv() | 19 #include <immintrin.h> // For _xgetbv() |
18 #endif | 20 #endif |
19 #endif | 21 #endif |
20 | 22 |
21 namespace base { | 23 namespace base { |
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79 | 81 |
80 __asm__ volatile ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (xcr)); | 82 __asm__ volatile ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (xcr)); |
81 return (static_cast<uint64>(edx) << 32) | eax; | 83 return (static_cast<uint64>(edx) << 32) | eax; |
82 } | 84 } |
83 | 85 |
84 #endif // !_MSC_VER | 86 #endif // !_MSC_VER |
85 #endif // ARCH_CPU_X86_FAMILY | 87 #endif // ARCH_CPU_X86_FAMILY |
86 | 88 |
87 } // anonymous namespace | 89 } // anonymous namespace |
88 | 90 |
91 #if defined(ARCH_CPU_ARM_FAMILY) | |
92 #if defined(OS_ANDROID) || defined(USE_AURA) | |
93 | |
94 std::string CpuBrandInfo() { | |
95 const char kProcessorPrefix[] = "Processor"; | |
96 std::string contents, cpu_brand; | |
97 ReadFileToString(FilePath("/proc/cpuinfo"), &contents); | |
98 DCHECK(!contents.empty()); | |
99 if (!contents.empty()) { | |
100 std::istringstream iss(contents); | |
101 std::string line; | |
102 while (std::getline(iss, line)) { | |
103 if (line.compare(0, strlen(kProcessorPrefix), kProcessorPrefix) == 0) { | |
104 size_t pos = line.find(": "); | |
105 if (pos != std::string::npos) { | |
rptr
2014/03/08 13:03:06
Takes care of review comment if ": " is not found
| |
106 cpu_brand.assign(line.substr(pos + 2)); | |
107 break; | |
rptr
2014/03/08 13:03:06
Takes care of review comment: Do file lookup until
| |
108 } | |
109 } | |
110 } | |
111 } | |
112 return cpu_brand; | |
113 } | |
114 | |
115 template <typename T, T (*F)(void)> | |
rptr
2014/03/08 13:03:06
Perform cpu brand caching using lazy instance as s
Mark Mentovai
2014/03/10 14:16:24
Why is this templated? You only use it once.
rptr
2014/03/11 15:47:14
Done.
| |
116 class LazyCpuInfoValue { | |
117 public: | |
118 LazyCpuInfoValue() : value_(F()) {} | |
119 ~LazyCpuInfoValue() {} | |
120 T value() { return value_; } | |
121 | |
122 private: | |
123 const T value_; | |
124 DISALLOW_COPY_AND_ASSIGN(LazyCpuInfoValue); | |
125 }; | |
126 | |
127 base::LazyInstance<LazyCpuInfoValue<std::string, CpuBrandInfo> >::Leaky | |
128 g_lazy_cpu_brand = LAZY_INSTANCE_INITIALIZER; | |
129 | |
130 // static | |
131 std::string CPU::CpuBrandInfo() { return g_lazy_cpu_brand.Get().value(); } | |
Mark Mentovai
2014/03/10 14:16:24
Why not a const string&?
rptr
2014/03/11 15:47:14
Done.
| |
132 | |
133 #endif // defined(OS_ANDROID) || defined(USE_AURA) | |
134 #endif // ARCH_CPU_ARM_FAMILY | |
135 | |
89 void CPU::Initialize() { | 136 void CPU::Initialize() { |
90 #if defined(ARCH_CPU_X86_FAMILY) | 137 #if defined(ARCH_CPU_X86_FAMILY) |
91 int cpu_info[4] = {-1}; | 138 int cpu_info[4] = {-1}; |
92 char cpu_string[48]; | 139 char cpu_string[48]; |
93 | 140 |
94 // __cpuid with an InfoType argument of 0 returns the number of | 141 // __cpuid with an InfoType argument of 0 returns the number of |
95 // valid Ids in CPUInfo[0] and the CPU identification string in | 142 // valid Ids in CPUInfo[0] and the CPU identification string in |
96 // the other three array elements. The CPU identification string is | 143 // the other three array elements. The CPU identification string is |
97 // not in linear order. The code below arranges the information | 144 // not in linear order. The code below arranges the information |
98 // in a human readable form. The human readable order is CPUInfo[1] | | 145 // in a human readable form. The human readable order is CPUInfo[1] | |
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151 } | 198 } |
152 cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); | 199 cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); |
153 } | 200 } |
154 | 201 |
155 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; | 202 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; |
156 if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { | 203 if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { |
157 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); | 204 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); |
158 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; | 205 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; |
159 } | 206 } |
160 #elif defined(ARCH_CPU_ARM_FAMILY) | 207 #elif defined(ARCH_CPU_ARM_FAMILY) |
161 // TODO(piman): Expand this. ARM has a CPUID register, but it's not available | 208 #if defined(OS_ANDROID) || defined(USE_AURA) |
Mark Mentovai
2014/03/10 14:16:24
What’s this got to do with Aura?
rptr
2014/03/11 15:47:14
My understanding is that (from comments of piman a
| |
162 // in user mode. /proc/cpuinfo has some information, but it's non standard, | 209 cpu_brand_.assign(CPU::CpuBrandInfo()); |
163 // platform-specific, and not accessible from the sandbox. | 210 #endif |
164 // For some purposes, this first approximation is enough. | |
165 // crbug.com/313454 | |
166 cpu_brand_.assign("ARM"); | |
167 #endif | 211 #endif |
168 } | 212 } |
169 | 213 |
170 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { | 214 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { |
171 if (has_avx()) return AVX; | 215 if (has_avx()) return AVX; |
172 if (has_sse42()) return SSE42; | 216 if (has_sse42()) return SSE42; |
173 if (has_sse41()) return SSE41; | 217 if (has_sse41()) return SSE41; |
174 if (has_ssse3()) return SSSE3; | 218 if (has_ssse3()) return SSSE3; |
175 if (has_sse3()) return SSE3; | 219 if (has_sse3()) return SSE3; |
176 if (has_sse2()) return SSE2; | 220 if (has_sse2()) return SSE2; |
177 if (has_sse()) return SSE; | 221 if (has_sse()) return SSE; |
178 return PENTIUM; | 222 return PENTIUM; |
179 } | 223 } |
180 | 224 |
181 } // namespace base | 225 } // namespace base |
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