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1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "base/cpu.h" | 5 #include "base/cpu.h" |
6 | 6 |
7 #include <string.h> | 7 #include <string.h> |
8 | 8 |
9 #include <algorithm> | 9 #include <algorithm> |
10 | 10 |
11 #include "base/basictypes.h" | 11 #include "base/basictypes.h" |
12 #include "base/file_util.h" | |
cpu_(ooo_6.6-7.5)
2014/04/24 03:36:50
can we put the file_util.h on an #ifdef, in most p
| |
13 #include "base/lazy_instance.h" | |
12 #include "build/build_config.h" | 14 #include "build/build_config.h" |
13 | 15 |
14 #if defined(ARCH_CPU_X86_FAMILY) | 16 #if defined(ARCH_CPU_X86_FAMILY) |
15 #if defined(_MSC_VER) | 17 #if defined(_MSC_VER) |
16 #include <intrin.h> | 18 #include <intrin.h> |
17 #include <immintrin.h> // For _xgetbv() | 19 #include <immintrin.h> // For _xgetbv() |
18 #endif | 20 #endif |
19 #endif | 21 #endif |
20 | 22 |
21 namespace base { | 23 namespace base { |
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77 uint64 _xgetbv(uint32 xcr) { | 79 uint64 _xgetbv(uint32 xcr) { |
78 uint32 eax, edx; | 80 uint32 eax, edx; |
79 | 81 |
80 __asm__ volatile ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (xcr)); | 82 __asm__ volatile ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (xcr)); |
81 return (static_cast<uint64>(edx) << 32) | eax; | 83 return (static_cast<uint64>(edx) << 32) | eax; |
82 } | 84 } |
83 | 85 |
84 #endif // !_MSC_VER | 86 #endif // !_MSC_VER |
85 #endif // ARCH_CPU_X86_FAMILY | 87 #endif // ARCH_CPU_X86_FAMILY |
86 | 88 |
89 #if defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX)) | |
90 | |
91 std::string ParseCpuInfo() { | |
92 const char kProcessorPrefix[] = "Processor"; | |
93 std::string contents, cpu_brand; | |
94 ReadFileToString(FilePath("/proc/cpuinfo"), &contents); | |
95 DCHECK(!contents.empty()); | |
96 if (!contents.empty()) { | |
97 std::istringstream iss(contents); | |
98 std::string line; | |
99 while (std::getline(iss, line)) { | |
100 if (line.compare(0, strlen(kProcessorPrefix), kProcessorPrefix) == 0) { | |
101 size_t pos = line.find(": "); | |
102 if (pos != std::string::npos) { | |
103 cpu_brand.assign(line.substr(pos + 2)); | |
104 break; | |
105 } | |
106 } | |
107 } | |
108 } | |
109 return cpu_brand; | |
110 } | |
111 | |
112 class LazyCpuInfoValue { | |
113 public: | |
114 LazyCpuInfoValue() : value_(ParseCpuInfo()) {} | |
115 const std::string& value() { return value_; } | |
116 | |
117 private: | |
118 const std::string value_; | |
119 DISALLOW_COPY_AND_ASSIGN(LazyCpuInfoValue); | |
120 }; | |
121 | |
122 base::LazyInstance<LazyCpuInfoValue> g_lazy_cpu_brand = | |
123 LAZY_INSTANCE_INITIALIZER; | |
124 | |
125 const std::string& CpuBrandInfo() { return g_lazy_cpu_brand.Get().value(); } | |
126 | |
127 #endif // defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || | |
128 // defined(OS_LINUX)) | |
129 | |
87 } // anonymous namespace | 130 } // anonymous namespace |
88 | 131 |
89 void CPU::Initialize() { | 132 void CPU::Initialize() { |
90 #if defined(ARCH_CPU_X86_FAMILY) | 133 #if defined(ARCH_CPU_X86_FAMILY) |
91 int cpu_info[4] = {-1}; | 134 int cpu_info[4] = {-1}; |
92 char cpu_string[48]; | 135 char cpu_string[48]; |
93 | 136 |
94 // __cpuid with an InfoType argument of 0 returns the number of | 137 // __cpuid with an InfoType argument of 0 returns the number of |
95 // valid Ids in CPUInfo[0] and the CPU identification string in | 138 // valid Ids in CPUInfo[0] and the CPU identification string in |
96 // the other three array elements. The CPU identification string is | 139 // the other three array elements. The CPU identification string is |
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150 cpu_string_ptr += sizeof(cpu_info); | 193 cpu_string_ptr += sizeof(cpu_info); |
151 } | 194 } |
152 cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); | 195 cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); |
153 } | 196 } |
154 | 197 |
155 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; | 198 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; |
156 if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { | 199 if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { |
157 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); | 200 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); |
158 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; | 201 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; |
159 } | 202 } |
160 #elif defined(ARCH_CPU_ARM_FAMILY) | 203 #elif defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX)) |
161 // TODO(piman): Expand this. ARM has a CPUID register, but it's not available | 204 cpu_brand_.assign(CpuBrandInfo()); |
162 // in user mode. /proc/cpuinfo has some information, but it's non standard, | |
163 // platform-specific, and not accessible from the sandbox. | |
164 // For some purposes, this first approximation is enough. | |
165 // crbug.com/313454 | |
166 cpu_brand_.assign("ARM"); | |
167 #endif | 205 #endif |
168 } | 206 } |
169 | 207 |
170 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { | 208 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { |
171 if (has_avx()) return AVX; | 209 if (has_avx()) return AVX; |
172 if (has_sse42()) return SSE42; | 210 if (has_sse42()) return SSE42; |
173 if (has_sse41()) return SSE41; | 211 if (has_sse41()) return SSE41; |
174 if (has_ssse3()) return SSSE3; | 212 if (has_ssse3()) return SSSE3; |
175 if (has_sse3()) return SSE3; | 213 if (has_sse3()) return SSE3; |
176 if (has_sse2()) return SSE2; | 214 if (has_sse2()) return SSE2; |
177 if (has_sse()) return SSE; | 215 if (has_sse()) return SSE; |
178 return PENTIUM; | 216 return PENTIUM; |
179 } | 217 } |
180 | 218 |
181 } // namespace base | 219 } // namespace base |
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