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Unified Diff: src/arm/code-stubs-arm.cc

Issue 1884193003: [arm] Turn off the default NaN mode on arm. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@arm64-default-nan
Patch Set: Created 4 years, 8 months ago
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Index: src/arm/code-stubs-arm.cc
diff --git a/src/arm/code-stubs-arm.cc b/src/arm/code-stubs-arm.cc
index 07a7305a34024ace326c3b28074839eece6afe52..3047cd41c185b9de0b8f64b90f7260f6689ee59d 100644
--- a/src/arm/code-stubs-arm.cc
+++ b/src/arm/code-stubs-arm.cc
@@ -1072,8 +1072,6 @@ void CEntryStub::Generate(MacroAssembler* masm) {
}
// Result returned in r0, r1:r0 or r2:r1:r0 - do not destroy these registers!
- __ VFPEnsureFPSCRState(r3);
-
// Check result for exception sentinel.
Label exception_returned;
__ CompareRoot(r0, Heap::kExceptionRootIndex);
@@ -1183,7 +1181,6 @@ void JSEntryStub::Generate(MacroAssembler* masm) {
__ vstm(db_w, sp, kFirstCalleeSavedDoubleReg, kLastCalleeSavedDoubleReg);
// Set up the reserved register for 0.0.
__ vmov(kDoubleRegZero, 0.0);
- __ VFPEnsureFPSCRState(r4);
// Get address of argv, see stm above.
// r0: code entry
@@ -3238,7 +3235,6 @@ void DirectCEntryStub::Generate(MacroAssembler* masm) {
// GC safe. The RegExp backend also relies on this.
__ str(lr, MemOperand(sp, 0));
__ blx(ip); // Call the C++ function.
- __ VFPEnsureFPSCRState(r2);
__ ldr(pc, MemOperand(sp, 0));
}
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