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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
| (...skipping 1110 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1121 if (op.is_reg_only()) { | 1121 if (op.is_reg_only()) { |
| 1122 test_b(op.reg(), imm8); | 1122 test_b(op.reg(), imm8); |
| 1123 return; | 1123 return; |
| 1124 } | 1124 } |
| 1125 EnsureSpace ensure_space(this); | 1125 EnsureSpace ensure_space(this); |
| 1126 EMIT(0xF6); | 1126 EMIT(0xF6); |
| 1127 emit_operand(eax, op); | 1127 emit_operand(eax, op); |
| 1128 emit_b(imm8); | 1128 emit_b(imm8); |
| 1129 } | 1129 } |
| 1130 | 1130 |
| 1131 void Assembler::test_w(Register reg, Immediate imm16) { |
| 1132 DCHECK(imm16.is_int16() || imm16.is_uint16()); |
| 1133 EnsureSpace ensure_space(this); |
| 1134 if (reg.is(eax)) { |
| 1135 EMIT(0xA9); |
| 1136 emit_w(imm16); |
| 1137 } else { |
| 1138 EMIT(0x66); |
| 1139 EMIT(0xF7); |
| 1140 EMIT(0xc0 | reg.code()); |
| 1141 emit_w(imm16); |
| 1142 } |
| 1143 } |
| 1144 |
| 1145 void Assembler::test_w(Register reg, const Operand& op) { |
| 1146 EnsureSpace ensure_space(this); |
| 1147 EMIT(0x66); |
| 1148 EMIT(0x85); |
| 1149 emit_operand(reg, op); |
| 1150 } |
| 1151 |
| 1152 void Assembler::test_w(const Operand& op, Immediate imm16) { |
| 1153 DCHECK(imm16.is_int16() || imm16.is_uint16()); |
| 1154 if (op.is_reg_only()) { |
| 1155 test_w(op.reg(), imm16); |
| 1156 return; |
| 1157 } |
| 1158 EnsureSpace ensure_space(this); |
| 1159 EMIT(0x66); |
| 1160 EMIT(0xF7); |
| 1161 emit_operand(eax, op); |
| 1162 emit_w(imm16); |
| 1163 } |
| 1131 | 1164 |
| 1132 void Assembler::xor_(Register dst, int32_t imm32) { | 1165 void Assembler::xor_(Register dst, int32_t imm32) { |
| 1133 EnsureSpace ensure_space(this); | 1166 EnsureSpace ensure_space(this); |
| 1134 emit_arith(6, Operand(dst), Immediate(imm32)); | 1167 emit_arith(6, Operand(dst), Immediate(imm32)); |
| 1135 } | 1168 } |
| 1136 | 1169 |
| 1137 | 1170 |
| 1138 void Assembler::xor_(Register dst, const Operand& src) { | 1171 void Assembler::xor_(Register dst, const Operand& src) { |
| 1139 EnsureSpace ensure_space(this); | 1172 EnsureSpace ensure_space(this); |
| 1140 EMIT(0x33); | 1173 EMIT(0x33); |
| (...skipping 998 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 2139 fflush(coverage_log); | 2172 fflush(coverage_log); |
| 2140 } | 2173 } |
| 2141 } | 2174 } |
| 2142 | 2175 |
| 2143 #endif | 2176 #endif |
| 2144 | 2177 |
| 2145 } // namespace internal | 2178 } // namespace internal |
| 2146 } // namespace v8 | 2179 } // namespace v8 |
| 2147 | 2180 |
| 2148 #endif // V8_TARGET_ARCH_X87 | 2181 #endif // V8_TARGET_ARCH_X87 |
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