[turbofan] ARM: elide masks on loads and stores

test/unittests/compiler/arm/instruction-selector-arm-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <limits>
 
 #include "test/unittests/compiler/instruction-selector-unittest.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 1380 matching lines @@
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(memacc.str_opcode, s[0]->arch_opcode());
     EXPECT_EQ(kMode_Offset_RI, s[0]->addressing_mode());
     ASSERT_EQ(3U, s[0]->InputCount());
     ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
     EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
     EXPECT_EQ(0U, s[0]->OutputCount());
   }
 }
 
+TEST_P(InstructionSelectorMemoryAccessTest, LoadWithWord32And0xff) {
+  const MemoryAccess mem = GetParam();
+  if (!(mem.type == MachineType::Float32() ||
+        mem.type == MachineType::Float64())) {
+    {
+      StreamBuilder m(this, mem.type, MachineType::Pointer(),
+                      MachineType::Int32());
+      m.Return(m.Word32And(m.Int32Constant(0xff),
+                           m.Load(mem.type, m.Parameter(0), m.Parameter(1))));
+      Stream s = m.Build();
+      ASSERT_EQ(1U, s.size());
+      EXPECT_EQ(kArmLdrb, s[0]->arch_opcode());
+      EXPECT_EQ(2U, s[0]->InputCount());
+      EXPECT_EQ(1U, s[0]->OutputCount());
+    }
+    {
+      StreamBuilder m(this, mem.type, MachineType::Pointer(),
+                      MachineType::Int32());
+      m.Return(m.Word32And(m.Load(mem.type, m.Parameter(0), m.Parameter(1)),
+                           m.Int32Constant(0xff)));
+      Stream s = m.Build();
+      ASSERT_EQ(1U, s.size());
+      EXPECT_EQ(kArmLdrb, s[0]->arch_opcode());
+      EXPECT_EQ(2U, s[0]->InputCount());
+      EXPECT_EQ(1U, s[0]->OutputCount());
+    }
+  }
+}
+
+TEST_P(InstructionSelectorMemoryAccessTest, LoadWithWord32And0xffff) {
+  const MemoryAccess mem = GetParam();
+  MachineRepresentation load_rep = mem.type.representation();
+  if (!(mem.type == MachineType::Float32() ||
+        mem.type == MachineType::Float64())) {
+    {
+      StreamBuilder m(this, mem.type, MachineType::Pointer(),
+                      MachineType::Int32());
+      m.Return(m.Word32And(m.Int32Constant(0xffff),
+                           m.Load(mem.type, m.Parameter(0), m.Parameter(1))));
+      Stream s = m.Build();
+      ASSERT_EQ(1U, s.size());
+      EXPECT_EQ(
+          (load_rep == MachineRepresentation::kWord8) ? kArmLdrb : kArmLdrh,
+          s[0]->arch_opcode());
+      EXPECT_EQ(2U, s[0]->InputCount());
+      EXPECT_EQ(1U, s[0]->OutputCount());
+    }
+    {
+      StreamBuilder m(this, mem.type, MachineType::Pointer(),
+                      MachineType::Int32());
+      m.Return(m.Word32And(m.Load(mem.type, m.Parameter(0), m.Parameter(1)),
+                           m.Int32Constant(0xffff)));
+      Stream s = m.Build();
+      ASSERT_EQ(1U, s.size());
+      EXPECT_EQ(
+          (load_rep == MachineRepresentation::kWord8) ? kArmLdrb : kArmLdrh,
+          s[0]->arch_opcode());
+      EXPECT_EQ(2U, s[0]->InputCount());
+      EXPECT_EQ(1U, s[0]->OutputCount());
+    }
+  }
+}
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
                         InstructionSelectorMemoryAccessTest,
                         ::testing::ValuesIn(kMemoryAccesses));
 
 
 // -----------------------------------------------------------------------------
 // Conversions.
 
 
@@ skipping 1521 matching lines @@
                                 m.Word32Shr(p0, m.Int32Constant(shr * 8)));
     m.Return(r);
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kArmUxth, s[0]->arch_opcode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(shr * 8, s.ToInt32(s[0]->InputAt(1)));
   }
 }
 
+TEST_F(InstructionSelectorTest, LoadWordWithWord32And) {
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (1 << shift);
+    Node* const r = m.Word32And(
+        m.Load(MachineType::Uint16(), m.Parameter(0), m.Parameter(1)),
+        m.Int32Constant(mask));
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmLdrh, s[0]->arch_opcode());
+    EXPECT_EQ(kArmAnd, s[1]->arch_opcode());
+    ASSERT_EQ(2U, s[1]->InputCount());
+    EXPECT_EQ(mask & 0xffff, s.ToInt32(s[1]->InputAt(1)));
+  }
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (1 << shift);
+    Node* const r = m.Word32And(
+        m.Int32Constant(mask),
+        m.Load(MachineType::Uint16(), m.Parameter(0), m.Parameter(1)));
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmLdrh, s[0]->arch_opcode());
+    EXPECT_EQ(kArmAnd, s[1]->arch_opcode());
+    ASSERT_EQ(2U, s[1]->InputCount());
+    EXPECT_EQ(mask & 0xffff, s.ToInt32(s[1]->InputAt(1)));
+  }
+  TRACED_FORRANGE(int32_t, shift, 0, 7) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12345600 | (1 << shift);
+    Node* const r = m.Word32And(
+        m.Int32Constant(mask),
+        m.Load(MachineType::Uint8(), m.Parameter(0), m.Parameter(1)));
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmLdrb, s[0]->arch_opcode());
+    EXPECT_EQ(kArmAnd, s[1]->arch_opcode());
+    ASSERT_EQ(2U, s[1]->InputCount());
+    EXPECT_EQ(mask & 0xff, s.ToInt32(s[1]->InputAt(1)));
+  }
+}
+
+TEST_F(InstructionSelectorTest, LoadWord16WithWord32Bic) {
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (0xffff & ~(1 << shift));
+    Node* const r = m.Word32And(
+        m.Load(MachineType::Uint16(), m.Parameter(0), m.Parameter(1)),
+        m.Int32Constant(mask));
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmLdrh, s[0]->arch_opcode());
+    EXPECT_EQ(kArmBic, s[1]->arch_opcode());
+    ASSERT_EQ(2U, s[1]->InputCount());
+    EXPECT_EQ(~mask & 0xffff, s.ToInt32(s[1]->InputAt(1)));
+  }
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (0xffff & ~(1 << shift));
+    Node* const r = m.Word32And(
+        m.Int32Constant(mask),
+        m.Load(MachineType::Uint16(), m.Parameter(0), m.Parameter(1)));
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmLdrh, s[0]->arch_opcode());
+    EXPECT_EQ(kArmBic, s[1]->arch_opcode());
+    ASSERT_EQ(2U, s[1]->InputCount());
+    EXPECT_EQ(~mask & 0xffff, s.ToInt32(s[1]->InputAt(1)));
+  }
+}
+
+TEST_F(InstructionSelectorTest, StoreWord16WithWord32And) {
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (1 << shift);
+    Node* const r = m.Store(MachineRepresentation::kWord16, m.Parameter(0),
+                            m.Word32And(m.Parameter(1), m.Int32Constant(mask)),
+                            kNoWriteBarrier);
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmAnd, s[0]->arch_opcode());
+    ASSERT_EQ(2U, s[0]->InputCount());
+    EXPECT_EQ(mask & 0xffff, s.ToInt32(s[0]->InputAt(1)));
+    EXPECT_EQ(kArmStrh, s[1]->arch_opcode());
+  }
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (1 << shift);
+    Node* const r = m.Store(MachineRepresentation::kWord16, m.Parameter(0),
+                            m.Word32And(m.Int32Constant(mask), m.Parameter(1)),
+                            kNoWriteBarrier);
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmAnd, s[0]->arch_opcode());
+    ASSERT_EQ(2U, s[0]->InputCount());
+    EXPECT_EQ(mask & 0xffff, s.ToInt32(s[0]->InputAt(1)));
+    EXPECT_EQ(kArmStrh, s[1]->arch_opcode());
+  }
+}
+
+TEST_F(InstructionSelectorTest, StoreWord16WithWord32Bic) {
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (0xffff & ~(1 << shift));
+    Node* const r = m.Store(MachineRepresentation::kWord16, m.Parameter(0),
+                            m.Word32And(m.Parameter(1), m.Int32Constant(mask)),
+                            kNoWriteBarrier);
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmBic, s[0]->arch_opcode());
+    ASSERT_EQ(2U, s[0]->InputCount());
+    EXPECT_EQ(~mask & 0xffff, s.ToInt32(s[0]->InputAt(1)));
+    EXPECT_EQ(kArmStrh, s[1]->arch_opcode());
+  }
+  TRACED_FORRANGE(int32_t, shift, 0, 15) {
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    MachineType::Int32());
+    uint32_t mask = 0x12340000 | (0xffff & ~(1 << shift));
+    Node* const r = m.Store(MachineRepresentation::kWord16, m.Parameter(0),
+                            m.Word32And(m.Int32Constant(mask), m.Parameter(1)),
+                            kNoWriteBarrier);
+    m.Return(r);
+    Stream s = m.Build();
+    ASSERT_EQ(2U, s.size());
+    EXPECT_EQ(kArmBic, s[0]->arch_opcode());
+    ASSERT_EQ(2U, s[0]->InputCount());
+    EXPECT_EQ(~mask & 0xffff, s.ToInt32(s[0]->InputAt(1)));
+    EXPECT_EQ(kArmStrh, s[1]->arch_opcode());
+  }
+}
 
 TEST_F(InstructionSelectorTest, Word32Clz) {
   StreamBuilder m(this, MachineType::Uint32(), MachineType::Uint32());
   Node* const p0 = m.Parameter(0);
   Node* const n = m.Word32Clz(p0);
   m.Return(n);
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kArmClz, s[0]->arch_opcode());
   ASSERT_EQ(1U, s[0]->InputCount());
@@ skipping 70 matching lines @@
   ASSERT_EQ(2U, s[0]->InputCount());
   EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
   EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8