S390: [Atomics] code stubs for atomic operations

S390: [Atomics] code stubs for atomic operations

Port 5e9ddf6ce4b698cb3112bd349ca5206cfada1437

Original commit message:
    * New atomic code stubs for x64, ia32, arm, arm64
    * Add convenience functions JumpIfNotValidSmiValue, JumpIfUintNotValidSmiValue
      to macro-assembler-ia32 (API based on x64 macro assembler)
    * Remove runtime implementation of Atomics.load, the code stub should always be
      called instead
    * Add new test to mjsunit atomics test; check that Smi values of different
      sizes are supported when possible, else fall back to HeapNumbers

    These changes were needed to add another codestub:
    * Bump kStubMajorKeyBits from 7 to 8
    * Reduce ScriptContextFieldStub::kSlotIndexBits from 13 to 12

R=binji@chromium.org, joransiu@ca.ibm.com, mbrandy@us.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com
BUG=v8:4614
LOG=N

Committed: https://crrev.com/146400aef6fd8b222ba727e2e0f57f0379928fa1
Cr-Commit-Position: refs/heads/master@{#35537}

[john.yan, 2016-04-15 11:37:31]

PTAL

[john.yan, 2016-04-15 11:38:18]

The CQ bit was checked by jyan@ca.ibm.com

[commit-bot: I haz the power, 2016-04-15 11:38:26]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1882733008/1
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1882733008/1

[commit-bot: I haz the power, 2016-04-15 11:38:27]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-04-15 11:38:28]

No L-G-T-M from a valid reviewer yet. 
CQ run can only be started by full committers or once the patch has
received an L-G-T-M from a full committer.
Even if an L-G-T-M may have been provided, it was from a non-committer,
_not_ a full super star committer.
Committers are members of the group "project-v8-committers".
Note that this has nothing to do with OWNERS files.

[john.yan, 2016-04-15 11:40:27]

The CQ bit was checked by jyan@ca.ibm.com to run a CQ dry run

[commit-bot: I haz the power, 2016-04-15 11:40:37]

Dry run: CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1882733008/1
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1882733008/1

[JoranSiu, 2016-04-15 12:07:58]

Just out of curiosity, are the AtomicLoad's (from Typed Arrays it seems)
guaranteed to be aligned to the element size?   I hope so, otherwise, the loads
may not be atomic...

https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc
File src/s390/code-stubs-s390.cc (right):

https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc...
src/s390/code-stubs-s390.cc:5715: __ b(&done_offset);
Please add Label::kNear

https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc...
src/s390/code-stubs-s390.cc:5832: __ LoadB(r2, MemOperand(backing_store,
index));
Did we reverse base and index here?
explicit MemOperand(Register rx, Register rb, Disp offset = 0);
The HW is optimized to expect the index register to be the one that's changing.

https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc...
src/s390/code-stubs-s390.cc:5833: __ LoadB(r2, r2);
Hmm, Do we need this 2nd LoadB (r2,r2)?

[commit-bot: I haz the power, 2016-04-15 12:17:56]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-04-15 12:17:57]

Dry run: This issue passed the CQ dry run.

[john.yan, 2016-04-15 12:27:31]

On 2016/04/15 12:07:58, JoranSiu wrote:
> Just out of curiosity, are the AtomicLoad's (from Typed Arrays it seems)
> guaranteed to be aligned to the element size?   I hope so, otherwise, the
loads
> may not be atomic...
> 
> https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc
> File src/s390/code-stubs-s390.cc (right):
> 
>
https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc...
> src/s390/code-stubs-s390.cc:5715: __ b(&done_offset);
> Please add Label::kNear
> 
>
https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc...
> src/s390/code-stubs-s390.cc:5832: __ LoadB(r2, MemOperand(backing_store,
> index));
> Did we reverse base and index here?
> explicit MemOperand(Register rx, Register rb, Disp offset = 0);
> The HW is optimized to expect the index register to be the one that's
changing.
> 
>
https://codereview.chromium.org/1882733008/diff/1/src/s390/code-stubs-s390.cc...
> src/s390/code-stubs-s390.cc:5833: __ LoadB(r2, r2);
> Hmm, Do we need this 2nd LoadB (r2,r2)?

For the question, I don't know yet. but just want to fix the build quickly.

[JoranSiu, 2016-04-15 13:32:01]

lgtm

[john.yan, 2016-04-15 13:47:59]

The CQ bit was checked by jyan@ca.ibm.com

[commit-bot: I haz the power, 2016-04-15 13:48:02]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1882733008/20001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1882733008/20001

[commit-bot: I haz the power, 2016-04-15 14:23:33]

Committed patchset #2 (id:20001)

[commit-bot: I haz the power, 2016-04-15 14:24:36]

Description was changed from

==========
S390: [Atomics] code stubs for atomic operations

Port 5e9ddf6ce4b698cb3112bd349ca5206cfada1437

Original commit message:
    * New atomic code stubs for x64, ia32, arm, arm64
    * Add convenience functions JumpIfNotValidSmiValue,
JumpIfUintNotValidSmiValue
      to macro-assembler-ia32 (API based on x64 macro assembler)
    * Remove runtime implementation of Atomics.load, the code stub should always
be
      called instead
    * Add new test to mjsunit atomics test; check that Smi values of different
      sizes are supported when possible, else fall back to HeapNumbers

    These changes were needed to add another codestub:
    * Bump kStubMajorKeyBits from 7 to 8
    * Reduce ScriptContextFieldStub::kSlotIndexBits from 13 to 12

R=binji@chromium.org, joransiu@ca.ibm.com, mbrandy@us.ibm.com,
michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com
BUG=v8:4614
LOG=N
==========

to

==========
S390: [Atomics] code stubs for atomic operations

Port 5e9ddf6ce4b698cb3112bd349ca5206cfada1437

Original commit message:
    * New atomic code stubs for x64, ia32, arm, arm64
    * Add convenience functions JumpIfNotValidSmiValue,
JumpIfUintNotValidSmiValue
      to macro-assembler-ia32 (API based on x64 macro assembler)
    * Remove runtime implementation of Atomics.load, the code stub should always
be
      called instead
    * Add new test to mjsunit atomics test; check that Smi values of different
      sizes are supported when possible, else fall back to HeapNumbers

    These changes were needed to add another codestub:
    * Bump kStubMajorKeyBits from 7 to 8
    * Reduce ScriptContextFieldStub::kSlotIndexBits from 13 to 12

R=binji@chromium.org, joransiu@ca.ibm.com, mbrandy@us.ibm.com,
michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com
BUG=v8:4614
LOG=N

Committed: https://crrev.com/146400aef6fd8b222ba727e2e0f57f0379928fa1
Cr-Commit-Position: refs/heads/master@{#35537}
==========

[commit-bot: I haz the power, 2016-04-15 14:24:37]

Patchset 2 (id:??) landed as
https://crrev.com/146400aef6fd8b222ba727e2e0f57f0379928fa1
Cr-Commit-Position: refs/heads/master@{#35537}