A64: Record the size of veneer pools for code offset mapping.

src/a64/assembler-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
@@ skipping 606 matching lines @@
 }
 
 
 void Assembler::ConstantPoolMarker(uint32_t size) {
   ASSERT(is_const_pool_blocked());
   // + 1 is for the crash guard.
   Emit(LDR_x_lit | ImmLLiteral(2 * size + 1) | Rt(xzr));
 }
 
 
+void Assembler::EmitPoolGuard() {
+  // We must generate only one instruction as this is used in scopes that
+  // control the size of the code generated.
+  Emit(BLR | Rn(xzr));
+}
+
+
 void Assembler::ConstantPoolGuard() {
 #ifdef DEBUG
   // Currently this is only used after a constant pool marker.
   ASSERT(is_const_pool_blocked());
   Instruction* instr = reinterpret_cast<Instruction*>(pc_);
   ASSERT(instr->preceding()->IsLdrLiteralX() &&
          instr->preceding()->Rt() == xzr.code());
 #endif
-
-  // We must generate only one instruction.
-  Emit(BLR | Rn(xzr));
+  EmitPoolGuard();
 }
 
 
 void Assembler::StartBlockVeneerPool() {
   ++veneer_pool_blocked_nesting_;
 }
 
 
 void Assembler::EndBlockVeneerPool() {
   if (--veneer_pool_blocked_nesting_ == 0) {
@@ skipping 1772 matching lines @@
     }
   }
 }
 
 
 void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
   // We do not try to reuse pool constants.
   RelocInfo rinfo(reinterpret_cast<byte*>(pc_), rmode, data, NULL);
   if (((rmode >= RelocInfo::JS_RETURN) &&
        (rmode <= RelocInfo::DEBUG_BREAK_SLOT)) ||
-      (rmode == RelocInfo::CONST_POOL)) {
+      (rmode == RelocInfo::CONST_POOL) ||
+      (rmode == RelocInfo::VENEER_POOL)) {
     // Adjust code for new modes.
     ASSERT(RelocInfo::IsDebugBreakSlot(rmode)
            || RelocInfo::IsJSReturn(rmode)
            || RelocInfo::IsComment(rmode)
            || RelocInfo::IsPosition(rmode)
-           || RelocInfo::IsConstPool(rmode));
+           || RelocInfo::IsConstPool(rmode)
+           || RelocInfo::IsVeneerPool(rmode));
     // These modes do not need an entry in the constant pool.
   } else {
     ASSERT(num_pending_reloc_info_ < kMaxNumPendingRelocInfo);
     if (num_pending_reloc_info_ == 0) {
       first_const_pool_use_ = pc_offset();
     }
     pending_reloc_info_[num_pending_reloc_info_++] = rinfo;
     // Make sure the constant pool is not emitted in place of the next
     // instruction for which we just recorded relocation info.
     BlockConstPoolFor(1);
@@ skipping 116 matching lines @@
     // support for 32-bit entries.
     ConstantPoolMarker(2 * num_pending_reloc_info_);
     ConstantPoolGuard();
 
     // Emit constant pool entries.
     for (int i = 0; i < num_pending_reloc_info_; i++) {
       RelocInfo& rinfo = pending_reloc_info_[i];
       ASSERT(rinfo.rmode() != RelocInfo::COMMENT &&
              rinfo.rmode() != RelocInfo::POSITION &&
              rinfo.rmode() != RelocInfo::STATEMENT_POSITION &&
-             rinfo.rmode() != RelocInfo::CONST_POOL);
+             rinfo.rmode() != RelocInfo::CONST_POOL &&
+             rinfo.rmode() != RelocInfo::VENEER_POOL);
 
       Instruction* instr = reinterpret_cast<Instruction*>(rinfo.pc());
       // Instruction to patch must be 'ldr rd, [pc, #offset]' with offset == 0.
       ASSERT(instr->IsLdrLiteral() &&
              instr->ImmLLiteral() == 0);
 
       instr->SetImmPCOffsetTarget(reinterpret_cast<Instruction*>(pc_));
       dc64(rinfo.data());
     }
 
@@ skipping 17 matching lines @@
 
 
 bool Assembler::ShouldEmitVeneer(int max_reachable_pc, int margin) {
   // Account for the branch around the veneers and the guard.
   int protection_offset = 2 * kInstructionSize;
   return pc_offset() > max_reachable_pc - margin - protection_offset -
     static_cast<int>(unresolved_branches_.size() * kMaxVeneerCodeSize);
 }
 
 
+void Assembler::RecordVeneerPool(int location_offset, int size) {
+#ifdef ENABLE_DEBUGGER_SUPPORT
+  RelocInfo rinfo(buffer_ + location_offset,
+                  RelocInfo::VENEER_POOL, static_cast<intptr_t>(size),
+                  NULL);
+  reloc_info_writer.Write(&rinfo);
+#endif
+}
+
+
 void Assembler::EmitVeneers(bool need_protection, int margin) {
   BlockPoolsScope scope(this);
   RecordComment("[ Veneers");
 
+  // The exact size of the veneer pool must be recorded (see the comment at the
+  // declaration site of RecordConstPool()), but computing the number of
+  // veneers that will be generated is not obvious. So instead we remember the
+  // current position and will record the size after the pool has been
+  // generated.
+  Label size_check;
+  bind(&size_check);
+  int veneer_pool_relocinfo_loc = pc_offset();
+#ifdef DEBUG
+  byte* reloc_writer_record_pos = reloc_info_writer.pos();
+#endif
+
   Label end;
   if (need_protection) {
     b(&end);
   }
 
   EmitVeneersGuard();
 
-  Label size_check;
+  Label veneer_size_check;
 
   std::multimap<int, FarBranchInfo>::iterator it, it_to_delete;
 
   it = unresolved_branches_.begin();
   while (it != unresolved_branches_.end()) {
     if (ShouldEmitVeneer(it->first, margin)) {
       Instruction* branch = InstructionAt(it->second.pc_offset_);
       Label* label = it->second.label_;
 
 #ifdef DEBUG
-      bind(&size_check);
+      bind(&veneer_size_check);
 #endif
       // Patch the branch to point to the current position, and emit a branch
       // to the label.
       Instruction* veneer = reinterpret_cast<Instruction*>(pc_);
       RemoveBranchFromLabelLinkChain(branch, label, veneer);
       branch->SetImmPCOffsetTarget(veneer);
       b(label);
 #ifdef DEBUG
-      ASSERT(SizeOfCodeGeneratedSince(&size_check) <=
+      ASSERT(SizeOfCodeGeneratedSince(&veneer_size_check) <=
              static_cast<uint64_t>(kMaxVeneerCodeSize));
-      size_check.Unuse();
+      veneer_size_check.Unuse();
 #endif
 
       it_to_delete = it++;
       unresolved_branches_.erase(it_to_delete);
     } else {
       ++it;
     }
   }
 
+  // Record the veneer pool size.
+  ASSERT(reloc_writer_record_pos == reloc_info_writer.pos());
+  int pool_size = SizeOfCodeGeneratedSince(&size_check);
+  RecordVeneerPool(veneer_pool_relocinfo_loc, pool_size);
+
   if (unresolved_branches_.empty()) {
     next_veneer_pool_check_ = kMaxInt;
   } else {
     next_veneer_pool_check_ =
       unresolved_branches_first_limit() - kVeneerDistanceCheckMargin;
   }
 
   bind(&end);
 
   RecordComment("]");
 }
 
 
-void Assembler::EmitVeneersGuard() {
-  if (emit_debug_code()) {
-    Unreachable();
-  }
-}
-
-
 void Assembler::CheckVeneerPool(bool require_jump,
                                 int margin) {
   // There is nothing to do if there are no pending veneer pool entries.
   if (unresolved_branches_.empty())  {
     ASSERT(next_veneer_pool_check_ == kMaxInt);
     return;
   }
 
   ASSERT(pc_offset() < unresolved_branches_first_limit());
 
@@ skipping 49 matching lines @@
   // code.
 #ifdef ENABLE_DEBUGGER_SUPPORT
   RecordRelocInfo(RelocInfo::CONST_POOL, static_cast<intptr_t>(size));
 #endif
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64