Subzero. ARM32. Vector shifts.

src/IceInstARM32.h

 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 417 matching lines @@
     Vadd,
     Vand,
     Vcmp,
     Vcvt,
     Vdiv,
     Veor,
     Vmla,
     Vmls,
     Vmrs,
     Vmul,
+    Vneg,
     Vorr,
+    Vshl,
     Vsqrt,
     Vsub
   };
 
   static constexpr size_t InstSize = sizeof(uint32_t);
 
-  static const char *getWidthString(Type Ty);
-  static const char *getVecWidthString(Type Ty);
   static CondARM32::Cond getOppositeCondition(CondARM32::Cond Cond);
 
   /// Called inside derived methods emit() to communicate that multiple
   /// instructions are being generated. Used by emitIAS() methods to
   /// generate textual fixups for instructions that are not yet
   /// implemented.
   void startNextInst(const Cfg *Func) const;
 
+  /// FPSign is used for certain vector instructions (particularly, right
+  /// shifts) that require an operand sign specification.
+  enum FPSign {
+    FS_None,
+    FS_Signed,
+    FS_Unsigned,
+  };
   /// Shared emit routines for common forms of instructions.
-  static void emitThreeAddrFP(const char *Opcode, const InstARM32 *Instr,
-                              const Cfg *Func);
-  static void emitFourAddrFP(const char *Opcode, const InstARM32 *Instr,
-                             const Cfg *Func);
+  /// @{
+  static void emitThreeAddrFP(const char *Opcode, FPSign Sign,
+                              const InstARM32 *Instr, const Cfg *Func);
+  static void emitFourAddrFP(const char *Opcode, FPSign Sign,
+                             const InstARM32 *Instr, const Cfg *Func);
+  /// @}
 
   void dump(const Cfg *Func) const override;
 
   void emitIAS(const Cfg *Func) const override;
 
 protected:
   InstARM32(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest)
       : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {}
 
   static bool isClassof(const Inst *Instr, InstKindARM32 MyKind) {
@@ skipping 18 matching lines @@
 
   CondARM32::Cond getPredicate() const { return Predicate; }
   void setPredicate(CondARM32::Cond Pred) { Predicate = Pred; }
 
   static const char *predString(CondARM32::Cond Predicate);
   void dumpOpcodePred(Ostream &Str, const char *Opcode, Type Ty) const;
 
   /// Shared emit routines for common forms of instructions.
   static void emitUnaryopGPR(const char *Opcode, const InstARM32Pred *Instr,
                              const Cfg *Func, bool NeedsWidthSuffix);
-  static void emitUnaryopFP(const char *Opcode, const InstARM32Pred *Instr,
-                            const Cfg *Func);
+  static void emitUnaryopFP(const char *Opcode, FPSign Sign,
+                            const InstARM32Pred *Instr, const Cfg *Func);
   static void emitTwoAddr(const char *Opcode, const InstARM32Pred *Instr,
                           const Cfg *Func);
   static void emitThreeAddr(const char *Opcode, const InstARM32Pred *Instr,
                             const Cfg *Func, bool SetFlags);
   static void emitFourAddr(const char *Opcode, const InstARM32Pred *Instr,
                            const Cfg *Func);
   static void emitCmpLike(const char *Opcode, const InstARM32Pred *Instr,
                           const Cfg *Func);
 
 protected:
@@ skipping 56 matching lines @@
 
 public:
   static InstARM32UnaryopFP *create(Cfg *Func, Variable *Dest, Variable *Src,
                                     CondARM32::Cond Predicate) {
     return new (Func->allocate<InstARM32UnaryopFP>())
         InstARM32UnaryopFP(Func, Dest, Src, Predicate);
   }
   void emit(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
-    emitUnaryopFP(Opcode, this, Func);
+    emitUnaryopFP(Opcode, Sign, this, Func);
   }
   void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrDump();
     dumpDest(Func);
     Str << " = ";
     dumpOpcodePred(Str, Opcode, getDest()->getType());
     Str << " ";
     dumpSources(Func);
   }
   static bool classof(const Inst *Instr) { return isClassof(Instr, K); }
 
-private:
+protected:
   InstARM32UnaryopFP(Cfg *Func, Variable *Dest, Operand *Src,
                      CondARM32::Cond Predicate)
       : InstARM32Pred(Func, K, 1, Dest, Predicate) {
     addSource(Src);
   }
 
+  FPSign Sign = FS_None;
   static const char *Opcode;
 };
 
+template <InstARM32::InstKindARM32 K>
+class InstARM32UnaryopSignAwareFP : public InstARM32UnaryopFP<K> {
+  InstARM32UnaryopSignAwareFP() = delete;
+  InstARM32UnaryopSignAwareFP(const InstARM32UnaryopSignAwareFP &) = delete;
+  InstARM32UnaryopSignAwareFP &
+  operator=(const InstARM32UnaryopSignAwareFP &) = delete;
+
+public:
+  static InstARM32UnaryopSignAwareFP *
+  create(Cfg *Func, Variable *Dest, Variable *Src, CondARM32::Cond Predicate) {
+    return new (Func->allocate<InstARM32UnaryopSignAwareFP>())
+        InstARM32UnaryopSignAwareFP(Func, Dest, Src, Predicate);
+  }
+  void emitIAS(const Cfg *Func) const override;
+  void setSignType(InstARM32::FPSign SignType) { this->Sign = SignType; }
+
+private:
+  InstARM32UnaryopSignAwareFP(Cfg *Func, Variable *Dest, Operand *Src,
+                              CondARM32::Cond Predicate)
+      : InstARM32UnaryopFP<K>(Func, Dest, Src, Predicate) {}
+};
+
 /// Instructions of the form x := x op y.
 template <InstARM32::InstKindARM32 K>
 class InstARM32TwoAddrGPR : public InstARM32Pred {
   InstARM32TwoAddrGPR() = delete;
   InstARM32TwoAddrGPR(const InstARM32TwoAddrGPR &) = delete;
   InstARM32TwoAddrGPR &operator=(const InstARM32TwoAddrGPR &) = delete;
 
 public:
   /// Dest must be a register.
   static InstARM32TwoAddrGPR *create(Cfg *Func, Variable *Dest, Operand *Src,
@@ skipping 130 matching lines @@
   /// Create a vector/FP binary-op instruction like vadd, and vsub. Everything
   /// must be a register.
   static InstARM32ThreeAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0,
                                       Variable *Src1) {
     return new (Func->allocate<InstARM32ThreeAddrFP>())
         InstARM32ThreeAddrFP(Func, Dest, Src0, Src1);
   }
   void emit(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
-    emitThreeAddrFP(Opcode, this, Func);
+    emitThreeAddrFP(Opcode, Sign, this, Func);
   }
   void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrDump();
     dumpDest(Func);
     Str << " = ";
     Str << Opcode << "." << getDest()->getType() << " ";
     dumpSources(Func);
   }
   static bool classof(const Inst *Instr) { return isClassof(Instr, K); }
 
-private:
-  InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0,
-                       Variable *Src1)
+protected:
+  FPSign Sign = FS_None;
+
+  InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Operand *Src1)
       : InstARM32(Func, K, 2, Dest) {
     addSource(Src0);
     addSource(Src1);
   }
 
   static const char *Opcode;
 };
 
+template <InstARM32::InstKindARM32 K>
+class InstARM32ThreeAddrSignAwareFP : public InstARM32ThreeAddrFP<K> {
+  InstARM32ThreeAddrSignAwareFP() = delete;
+  InstARM32ThreeAddrSignAwareFP(const InstARM32ThreeAddrSignAwareFP &) = delete;
+  InstARM32ThreeAddrSignAwareFP &
+  operator=(const InstARM32ThreeAddrSignAwareFP &) = delete;
+
+public:
+  /// Create a vector/FP binary-op instruction like vadd, and vsub. Everything
+  /// must be a register.
+  static InstARM32ThreeAddrSignAwareFP *create(Cfg *Func, Variable *Dest,
+                                               Variable *Src0, Variable *Src1) {
+    return new (Func->allocate<InstARM32ThreeAddrSignAwareFP>())
+        InstARM32ThreeAddrSignAwareFP(Func, Dest, Src0, Src1);
+  }
+
+  void emitIAS(const Cfg *Func) const override;
+  void setSignType(InstARM32::FPSign SignType) { this->Sign = SignType; }
+
+private:
+  InstARM32ThreeAddrSignAwareFP(Cfg *Func, Variable *Dest, Variable *Src0,
+                                Variable *Src1)
+      : InstARM32ThreeAddrFP<K>(Func, Dest, Src0, Src1) {}
+};
+
 /// Instructions of the form x := a op1 (y op2 z). E.g., multiply accumulate.
 template <InstARM32::InstKindARM32 K>
 class InstARM32FourAddrGPR : public InstARM32Pred {
   InstARM32FourAddrGPR() = delete;
   InstARM32FourAddrGPR(const InstARM32FourAddrGPR &) = delete;
   InstARM32FourAddrGPR &operator=(const InstARM32FourAddrGPR &) = delete;
 
 public:
   // Every operand must be a register.
   static InstARM32FourAddrGPR *create(Cfg *Func, Variable *Dest, Variable *Src0,
@@ skipping 47 matching lines @@
 public:
   // Every operand must be a register.
   static InstARM32FourAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0,
                                      Variable *Src1) {
     return new (Func->allocate<InstARM32FourAddrFP>())
         InstARM32FourAddrFP(Func, Dest, Src0, Src1);
   }
   void emit(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
-    emitFourAddrFP(Opcode, this, Func);
+    emitFourAddrFP(Opcode, Sign, this, Func);
   }
   void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrDump();
     dumpDest(Func);
     Str << " = ";
     Str << Opcode << "." << getDest()->getType() << " ";
     dumpDest(Func);
     Str << ", ";
     dumpSources(Func);
   }
   static bool classof(const Inst *Instr) { return isClassof(Instr, K); }
 
 private:
   InstARM32FourAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1)
       : InstARM32(Func, K, 3, Dest) {
     addSource(Dest);
     addSource(Src0);
     addSource(Src1);
   }
 
+  FPSign Sign = FS_None;
   static const char *Opcode;
 };
 
 /// Instructions of the form x cmpop y (setting flags).
 template <InstARM32::InstKindARM32 K>
 class InstARM32CmpLike : public InstARM32Pred {
   InstARM32CmpLike() = delete;
   InstARM32CmpLike(const InstARM32CmpLike &) = delete;
   InstARM32CmpLike &operator=(const InstARM32CmpLike &) = delete;
 
@@ skipping 47 matching lines @@
 using InstARM32Sdiv = InstARM32ThreeAddrGPR<InstARM32::Sdiv>;
 using InstARM32Sub = InstARM32ThreeAddrGPR<InstARM32::Sub>;
 using InstARM32Udiv = InstARM32ThreeAddrGPR<InstARM32::Udiv>;
 using InstARM32Vadd = InstARM32ThreeAddrFP<InstARM32::Vadd>;
 using InstARM32Vand = InstARM32ThreeAddrFP<InstARM32::Vand>;
 using InstARM32Vdiv = InstARM32ThreeAddrFP<InstARM32::Vdiv>;
 using InstARM32Veor = InstARM32ThreeAddrFP<InstARM32::Veor>;
 using InstARM32Vmla = InstARM32FourAddrFP<InstARM32::Vmla>;
 using InstARM32Vmls = InstARM32FourAddrFP<InstARM32::Vmls>;
 using InstARM32Vmul = InstARM32ThreeAddrFP<InstARM32::Vmul>;
+using InstARM32Vneg = InstARM32UnaryopSignAwareFP<InstARM32::Vneg>;
 using InstARM32Vorr = InstARM32ThreeAddrFP<InstARM32::Vorr>;
+using InstARM32Vshl = InstARM32ThreeAddrSignAwareFP<InstARM32::Vshl>;
 using InstARM32Vsub = InstARM32ThreeAddrFP<InstARM32::Vsub>;
 using InstARM32Ldr = InstARM32LoadBase<InstARM32::Ldr>;
 using InstARM32Ldrex = InstARM32LoadBase<InstARM32::Ldrex>;
 /// MovT leaves the bottom bits alone so dest is also a source. This helps
 /// indicate that a previous MovW setting dest is not dead code.
 using InstARM32Movt = InstARM32TwoAddrGPR<InstARM32::Movt>;
 using InstARM32Movw = InstARM32UnaryopGPR<InstARM32::Movw, false>;
 using InstARM32Clz = InstARM32UnaryopGPR<InstARM32::Clz, false>;
 using InstARM32Mvn = InstARM32UnaryopGPR<InstARM32::Mvn, false>;
 using InstARM32Rbit = InstARM32UnaryopGPR<InstARM32::Rbit, false>;
@@ skipping 578 matching lines @@
 // violations and link errors.
 
 template <> void InstARM32Ldr::emit(const Cfg *Func) const;
 template <> void InstARM32Movw::emit(const Cfg *Func) const;
 template <> void InstARM32Movt::emit(const Cfg *Func) const;
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTARM32_H