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Side by Side Diff: tests_lit/assembler/arm32/vcvt.u32.f32.ll

Issue 1878943009: Subzero. ARM32. Vector casts. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Adds vcvt assembler lit tests. Created 4 years, 8 months ago
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1 ; Show that we know how to translate converting float to unsigned integer. 1 ; Show that we know how to translate converting float to unsigned integer.
2 2
3 ; REQUIRES: allow_dump 3 ; REQUIRES: allow_dump
4 4
5 ; Compile using standalone assembler. 5 ; Compile using standalone assembler.
6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
7 ; RUN: --reg-use=s20 | FileCheck %s --check-prefix=ASM 7 ; RUN: --reg-use=s20 | FileCheck %s --check-prefix=ASM
8 8
9 ; Show bytes in assembled standalone code. 9 ; Show bytes in assembled standalone code.
10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
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28 ; ASM-NEXT: .LFloatToUnsignedInt$entry: 28 ; ASM-NEXT: .LFloatToUnsignedInt$entry:
29 ; IASM-NEXT: .LFloatToUnsignedInt$entry: 29 ; IASM-NEXT: .LFloatToUnsignedInt$entry:
30 30
31 %v = fptoui float 0.0 to i32 31 %v = fptoui float 0.0 to i32
32 ; ASM: vcvt.u32.f32 s20, s20 32 ; ASM: vcvt.u32.f32 s20, s20
33 ; DIS: 14: eebcaaca 33 ; DIS: 14: eebcaaca
34 ; IASM-NOT: vcvt 34 ; IASM-NOT: vcvt
35 35
36 ret i32 %v 36 ret i32 %v
37 } 37 }
38
39 define internal <4 x i32> @FloatVecToUIntVec(<4 x float> %a) {
40 ; ASM-LABEL: FloatVecToUIntVec:
41 ; DIS-LABEL: 00000030 <FloatVecToUIntVec>:
42 ; IASM-LABEL: FloatVecToUIntVec:
43
44 %v = fptoui <4 x float> %a to <4 x i32>
45
46 ; ASM: vcvt.u32.f32 q0, q0
47 ; DIS: 40: f3bb07c0
48 ; IASM-NOT: vcvt.u32.f32
49
50 ret <4 x i32> %v
51 }
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