tests_lit/assembler/arm32/vcvt.s32.f32.ll - Issue 1878943009: Subzero. ARM32. Vector casts.

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Side by Side Diff: tests_lit/assembler/arm32/vcvt.s32.f32.ll

Issue 1878943009: Subzero. ARM32. Vector casts. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Adds vcvt assembler lit tests. Created 4 years, 8 months ago

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1 ; Show that we know how to translate converting float to signed integer.	1 ; Show that we know how to translate converting float to signed integer.

2	2

3 ; REQUIRES: allow_dump	3 ; REQUIRES: allow_dump

4	4

5 ; Compile using standalone assembler.	5 ; Compile using standalone assembler.

6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \	6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \

7 ; RUN: --reg-use=s20 \| FileCheck %s --check-prefix=ASM	7 ; RUN: --reg-use=s20 \| FileCheck %s --check-prefix=ASM

8	8

9 ; Show bytes in assembled standalone code.	9 ; Show bytes in assembled standalone code.

10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \	10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \

(...skipping 18 matching lines...) Expand all Loading...
29 ; IASM-NEXT: .LFloatToSignedInt$entry:	29 ; IASM-NEXT: .LFloatToSignedInt$entry:

30	30

31 %v = fptosi float 0.0 to i32	31 %v = fptosi float 0.0 to i32

32	32

33 ; ASM: vcvt.s32.f32 s20, s20	33 ; ASM: vcvt.s32.f32 s20, s20

34 ; DIS: 14: eebdaaca	34 ; DIS: 14: eebdaaca

35 ; IASM-NOT: vcvt	35 ; IASM-NOT: vcvt

36	36

37 ret i32 %v	37 ret i32 %v

38 }	38 }

	39

	40 define internal <4 x i32> @FloatVecToIntVec(<4 x float> %a) {

	41 ; ASM-LABEL: FloatVecToIntVec:

	42 ; DIS-LABEL: 00000030 <FloatVecToIntVec>:

	43 ; IASM-LABEL: FloatVecToIntVec:

	44

	45 %v = fptosi <4 x float> %a to <4 x i32>

	46

	47 ; ASM: vcvt.s32.f32 q0, q0

	48 ; DIS: 40: f3bb0740

	49 ; IASM-NOT: vcvt.s32.f32

	50

	51 ret <4 x i32> %v

	52 }

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