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Side by Side Diff: tests_lit/assembler/arm32/vcvt.f32.s32.ll

Issue 1878943009: Subzero. ARM32. Vector casts. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Adds vcvt assembler lit tests. Created 4 years, 8 months ago
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1 ; Show that we know how to translate converting signed integer to floast. 1 ; Show that we know how to translate converting signed integer to floast.
2 2
3 ; REQUIRES: allow_dump 3 ; REQUIRES: allow_dump
4 4
5 ; Compile using standalone assembler. 5 ; Compile using standalone assembler.
6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
7 ; RUN: --reg-use=s20 | FileCheck %s --check-prefix=ASM 7 ; RUN: --reg-use=s20 | FileCheck %s --check-prefix=ASM
8 8
9 ; Show bytes in assembled standalone code. 9 ; Show bytes in assembled standalone code.
10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
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29 ; IASM: .LSignedIntToFloat$entry: 29 ; IASM: .LSignedIntToFloat$entry:
30 30
31 %v = sitofp i32 17 to float 31 %v = sitofp i32 17 to float
32 32
33 ; ASM: vcvt.f32.s32 s20, s20 33 ; ASM: vcvt.f32.s32 s20, s20
34 ; DIS: 10: eeb8aaca 34 ; DIS: 10: eeb8aaca
35 ; IASM-NOT: vcvt 35 ; IASM-NOT: vcvt
36 36
37 ret float %v 37 ret float %v
38 } 38 }
39
40 define internal <4 x float> @IntVecToFloatVec(<4 x i32> %a) {
41 ; ASM-LABEL: IntVecToFloatVec:
42 ; DIS-LABEL: 00000030 <IntVecToFloatVec>:
43 ; IASM-LABEL: IntVecToFloatVec:
44
45 %v = sitofp <4 x i32> %a to <4 x float>
46
47 ; ASM: vcvt.f32.s32 q0, q0
48 ; DIS: 40: f3bb0640
49 ; IASM-NOT: vcvt.f32.s32
Jim Stichnoth 2016/04/14 21:17:16 It might be "safer" to check against just "vcvt" l
John 2016/04/14 21:22:11 Done (in the next CL.)
50
51 ret <4 x float> %v
52 }
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