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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> | 5 #include <assert.h> |
| 6 #include <stdarg.h> | 6 #include <stdarg.h> |
| 7 #include <stdio.h> | 7 #include <stdio.h> |
| 8 | 8 |
| 9 #if V8_TARGET_ARCH_X64 | 9 #if V8_TARGET_ARCH_X64 |
| 10 | 10 |
| 11 #include "src/base/compiler-specific.h" | |
| 12 #include "src/base/lazy-instance.h" | 11 #include "src/base/lazy-instance.h" |
| 13 #include "src/disasm.h" | 12 #include "src/disasm.h" |
| 14 | 13 |
| 15 namespace disasm { | 14 namespace disasm { |
| 16 | 15 |
| 17 enum OperandType { | 16 enum OperandType { |
| 18 UNSET_OP_ORDER = 0, | 17 UNSET_OP_ORDER = 0, |
| 19 // Operand size decides between 16, 32 and 64 bit operands. | 18 // Operand size decides between 16, 32 and 64 bit operands. |
| 20 REG_OPER_OP_ORDER = 1, // Register destination, operand source. | 19 REG_OPER_OP_ORDER = 1, // Register destination, operand source. |
| 21 OPER_REG_OP_ORDER = 2, // Operand destination, register source. | 20 OPER_REG_OP_ORDER = 2, // Operand destination, register source. |
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| 473 int F6F7Instruction(byte* data); | 472 int F6F7Instruction(byte* data); |
| 474 int ShiftInstruction(byte* data); | 473 int ShiftInstruction(byte* data); |
| 475 int JumpShort(byte* data); | 474 int JumpShort(byte* data); |
| 476 int JumpConditional(byte* data); | 475 int JumpConditional(byte* data); |
| 477 int JumpConditionalShort(byte* data); | 476 int JumpConditionalShort(byte* data); |
| 478 int SetCC(byte* data); | 477 int SetCC(byte* data); |
| 479 int FPUInstruction(byte* data); | 478 int FPUInstruction(byte* data); |
| 480 int MemoryFPUInstruction(int escape_opcode, int regop, byte* modrm_start); | 479 int MemoryFPUInstruction(int escape_opcode, int regop, byte* modrm_start); |
| 481 int RegisterFPUInstruction(int escape_opcode, byte modrm_byte); | 480 int RegisterFPUInstruction(int escape_opcode, byte modrm_byte); |
| 482 int AVXInstruction(byte* data); | 481 int AVXInstruction(byte* data); |
| 483 PRINTF_FORMAT(2, 3) void AppendToBuffer(const char* format, ...); | 482 void AppendToBuffer(const char* format, ...); |
| 484 | 483 |
| 485 void UnimplementedInstruction() { | 484 void UnimplementedInstruction() { |
| 486 if (abort_on_unimplemented_) { | 485 if (abort_on_unimplemented_) { |
| 487 CHECK(false); | 486 CHECK(false); |
| 488 } else { | 487 } else { |
| 489 AppendToBuffer("'Unimplemented Instruction'"); | 488 AppendToBuffer("'Unimplemented Instruction'"); |
| 490 } | 489 } |
| 491 } | 490 } |
| 492 }; | 491 }; |
| 493 | 492 |
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| 612 break; | 611 break; |
| 613 case OPERAND_QUADWORD_SIZE: | 612 case OPERAND_QUADWORD_SIZE: |
| 614 value = *reinterpret_cast<int32_t*>(data); | 613 value = *reinterpret_cast<int32_t*>(data); |
| 615 count = 4; | 614 count = 4; |
| 616 break; | 615 break; |
| 617 default: | 616 default: |
| 618 UNREACHABLE(); | 617 UNREACHABLE(); |
| 619 value = 0; // Initialize variables on all paths to satisfy the compiler. | 618 value = 0; // Initialize variables on all paths to satisfy the compiler. |
| 620 count = 0; | 619 count = 0; |
| 621 } | 620 } |
| 622 AppendToBuffer("%" PRIx64, value); | 621 AppendToBuffer("%" V8_PTR_PREFIX "x", value); |
| 623 return count; | 622 return count; |
| 624 } | 623 } |
| 625 | 624 |
| 626 | 625 |
| 627 int DisassemblerX64::PrintRightOperand(byte* modrmp) { | 626 int DisassemblerX64::PrintRightOperand(byte* modrmp) { |
| 628 return PrintRightOperandHelper(modrmp, | 627 return PrintRightOperandHelper(modrmp, |
| 629 &DisassemblerX64::NameOfCPURegister); | 628 &DisassemblerX64::NameOfCPURegister); |
| 630 } | 629 } |
| 631 | 630 |
| 632 | 631 |
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| 1993 case ZERO_OPERANDS_INSTR: | 1992 case ZERO_OPERANDS_INSTR: |
| 1994 if (current >= 0xA4 && current <= 0xA7) { | 1993 if (current >= 0xA4 && current <= 0xA7) { |
| 1995 // String move or compare operations. | 1994 // String move or compare operations. |
| 1996 if (group_1_prefix_ == REP_PREFIX) { | 1995 if (group_1_prefix_ == REP_PREFIX) { |
| 1997 // REP. | 1996 // REP. |
| 1998 AppendToBuffer("rep "); | 1997 AppendToBuffer("rep "); |
| 1999 } | 1998 } |
| 2000 if (rex_w()) AppendToBuffer("REX.W "); | 1999 if (rex_w()) AppendToBuffer("REX.W "); |
| 2001 AppendToBuffer("%s%c", idesc.mnem, operand_size_code()); | 2000 AppendToBuffer("%s%c", idesc.mnem, operand_size_code()); |
| 2002 } else { | 2001 } else { |
| 2003 AppendToBuffer("%s%c", idesc.mnem, operand_size_code()); | 2002 AppendToBuffer("%s", idesc.mnem, operand_size_code()); |
| 2004 } | 2003 } |
| 2005 data++; | 2004 data++; |
| 2006 break; | 2005 break; |
| 2007 | 2006 |
| 2008 case TWO_OPERANDS_INSTR: | 2007 case TWO_OPERANDS_INSTR: |
| 2009 data++; | 2008 data++; |
| 2010 data += PrintOperands(idesc.mnem, idesc.op_order_, data); | 2009 data += PrintOperands(idesc.mnem, idesc.op_order_, data); |
| 2011 break; | 2010 break; |
| 2012 | 2011 |
| 2013 case JUMP_CONDITIONAL_SHORT_INSTR: | 2012 case JUMP_CONDITIONAL_SHORT_INSTR: |
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| 2328 value = *reinterpret_cast<uint32_t*>(data + 1); | 2327 value = *reinterpret_cast<uint32_t*>(data + 1); |
| 2329 data += 5; | 2328 data += 5; |
| 2330 break; | 2329 break; |
| 2331 case OPERAND_QUADWORD_SIZE: | 2330 case OPERAND_QUADWORD_SIZE: |
| 2332 value = *reinterpret_cast<int32_t*>(data + 1); | 2331 value = *reinterpret_cast<int32_t*>(data + 1); |
| 2333 data += 5; | 2332 data += 5; |
| 2334 break; | 2333 break; |
| 2335 default: | 2334 default: |
| 2336 UNREACHABLE(); | 2335 UNREACHABLE(); |
| 2337 } | 2336 } |
| 2338 AppendToBuffer("test%c rax,0x%" PRIx64, operand_size_code(), value); | 2337 AppendToBuffer("test%c rax,0x%" V8_PTR_PREFIX "x", |
| 2338 operand_size_code(), |
| 2339 value); |
| 2339 break; | 2340 break; |
| 2340 } | 2341 } |
| 2341 case 0xD1: // fall through | 2342 case 0xD1: // fall through |
| 2342 case 0xD3: // fall through | 2343 case 0xD3: // fall through |
| 2343 case 0xC1: | 2344 case 0xC1: |
| 2344 data += ShiftInstruction(data); | 2345 data += ShiftInstruction(data); |
| 2345 break; | 2346 break; |
| 2346 case 0xD0: // fall through | 2347 case 0xD0: // fall through |
| 2347 case 0xD2: // fall through | 2348 case 0xD2: // fall through |
| 2348 case 0xC0: | 2349 case 0xC0: |
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| 2501 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { | 2502 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { |
| 2502 fprintf(f, " "); | 2503 fprintf(f, " "); |
| 2503 } | 2504 } |
| 2504 fprintf(f, " %s\n", buffer.start()); | 2505 fprintf(f, " %s\n", buffer.start()); |
| 2505 } | 2506 } |
| 2506 } | 2507 } |
| 2507 | 2508 |
| 2508 } // namespace disasm | 2509 } // namespace disasm |
| 2509 | 2510 |
| 2510 #endif // V8_TARGET_ARCH_X64 | 2511 #endif // V8_TARGET_ARCH_X64 |
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